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The current handling for arc instructions longer than 32-bits is all handled as a special case in both the assembler and disassembler. The problem with this approach is that it leads to code duplication, selecting a long instruction is exactly the same process as selecting a short instruction, except over more bits, in both cases we select based on bit comparison, and initial operand insertion and extraction. This commit unifies both the long and short instruction worlds, converting the core opcodes library from being largely 32-bit focused, to being largely 64-bit focused. The changes are, on the whole, not too much. There's obviously a lot of type changes but otherwise the bulk of the code just works. Most of the actual functional changes are to code that previously handled the longer 48 or 64 bit instructions. The insert/extract handlers for these have now been brought into line with the short instruction insert/extract handlers. All of the special case handling code that was previously added has now been removed again. Overall, this commit reduces the amount of code in the arc assembler and disassembler. gas/ChangeLog: * config/tc-arc.c (struct arc_insn): Change type of insn field. (md_number_to_chars_midend): Support 6- and 8-byte values. (emit_insn0): Update debug output. (find_opcode_match): Likewise. (build_fake_opcode_hash_entry): Delete. (find_special_case_long_opcode): Delete. (find_special_case): Remove long format special case handling. (insert_operand): Change instruction type and update debug print format. (assemble_insn): Change instruction type, update debug print formats, and remove unneeded assert. include/ChangeLog: * opcode/arc.h (struct arc_opcode): Change type of opcode and mask fields. (struct arc_long_opcode): Delete. (struct arc_operand): Change types for insert and extract handlers. opcodes/ChangeLog: * arc-dis.c (struct arc_operand_iterator): Remove all fields relating to long instruction processing, add new limm field. (OPCODE): Rename to... (OPCODE_32BIT_INSN): ...this. (OPCODE_AC): Delete. (skip_this_opcode): Handle different instruction lengths, update macro name. (special_flag_p): Update parameter type. (find_format_from_table): Update for more instruction lengths. (find_format_long_instructions): Delete. (find_format): Update for more instruction lengths. (arc_insn_length): Likewise. (extract_operand_value): Update for more instruction lengths. (operand_iterator_next): Remove code relating to long instructions. (arc_opcode_to_insn_type): New function. (print_insn_arc):Update for more instructions lengths. * arc-ext.c (extInstruction_t): Change argument type. * arc-ext.h (extInstruction_t): Change argument type. * arc-fxi.h: Change type unsigned to unsigned long long extensively throughout. * arc-nps400-tbl.h: Add long instructions taken from arc_long_opcodes table in arc-opc.c. * arc-opc.c: Update parameter types on insert/extract handlers. (arc_long_opcodes): Delete. (arc_num_long_opcodes): Delete. (arc_opcode_len): Update for more instruction lengths.
143 lines
3.9 KiB
C
143 lines
3.9 KiB
C
/* ARC target-dependent stuff. Extension data structures.
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Copyright (C) 1995-2016 Free Software Foundation, Inc.
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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/*This header file defines a table of extensions to the ARC processor
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architecture. These extensions are read from the '.arcextmap' or
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'.gnu.linkonce.arcextmap.<type>.<N>' sections in the ELF file which
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is identified by the bfd parameter to the build_ARC_extmap function.
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These extensions may include:
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core registers
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auxiliary registers
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instructions
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condition codes
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Once the table has been constructed, accessor functions may be used
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to retrieve information from it.
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The build_ARC_extmap constructor function build_ARC_extmap may be
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called as many times as required; it will re-initialize the table
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each time. */
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#ifndef ARC_EXTENSIONS_H
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#define ARC_EXTENSIONS_H
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#include "opcode/arc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define IGNORE_FIRST_OPD 1
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/* Define this if we do not want to encode instructions based on the
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ARCompact Programmer's Reference. */
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#define UNMANGLED
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/* This defines the kinds of extensions which may be read from the
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ections in the executable files. */
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enum ExtOperType
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{
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EXT_INSTRUCTION = 0,
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EXT_CORE_REGISTER = 1,
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EXT_AUX_REGISTER = 2,
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EXT_COND_CODE = 3,
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EXT_INSTRUCTION32 = 4,
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EXT_AC_INSTRUCTION = 4,
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EXT_REMOVE_CORE_REG = 5,
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EXT_LONG_CORE_REGISTER = 6,
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EXT_AUX_REGISTER_EXTENDED = 7,
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EXT_INSTRUCTION32_EXTENDED = 8,
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EXT_CORE_REGISTER_CLASS = 9
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};
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enum ExtReadWrite
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{
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REG_INVALID,
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REG_READ,
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REG_WRITE,
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REG_READWRITE
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};
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/* Macro used when generating the patterns for an extension
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instruction. */
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#define INSERT_XOP(OP, NAME, CODE, MASK, CPU, ARG, FLG) \
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do { \
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(OP)->name = NAME; \
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(OP)->opcode = CODE; \
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(OP)->mask = MASK; \
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(OP)->cpu = CPU; \
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(OP)->insn_class = ARITH; \
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(OP)->subclass = NONE; \
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memcpy ((OP)->operands, (ARG), MAX_INSN_ARGS); \
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memcpy ((OP)->flags, (FLG), MAX_INSN_FLGS); \
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(OP++); \
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} while (0)
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/* Typedef to hold the extension instruction definition. */
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typedef struct ExtInstruction
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{
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/* Name. */
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char *name;
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/* Major opcode. */
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char major;
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/* Minor(sub) opcode. */
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char minor;
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/* Flags, holds the syntax class and modifiers. */
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char flags;
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/* Syntax class. Use by assembler. */
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unsigned char syntax;
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/* Syntax class modifier. Used by assembler. */
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unsigned char modsyn;
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/* Suffix class. Used by assembler. */
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unsigned char suffix;
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/* Pointer to the next extension instruction. */
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struct ExtInstruction* next;
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} extInstruction_t;
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/* Constructor function. */
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extern void build_ARC_extmap (bfd *);
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/* Accessor functions. */
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extern enum ExtReadWrite arcExtMap_coreReadWrite (int);
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extern const char * arcExtMap_coreRegName (int);
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extern const char * arcExtMap_auxRegName (long);
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extern const char * arcExtMap_condCodeName (int);
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extern const extInstruction_t *arcExtMap_insn (int, unsigned long long);
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extern struct arc_opcode *arcExtMap_genOpcode (const extInstruction_t *,
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unsigned arc_target,
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const char **errmsg);
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/* Dump function (for debugging). */
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extern void dump_ARC_extmap (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARC_EXTENSIONS_H */
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