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d4e3adda12
Existing ports already have sizeof_pc set to the same size as sim_cia,
so simply make that part of the core code. We already assume this in
places by way of sim_pc_{get,set}, and this is how it's documented in
the sim-base.h API.
There is code to allow sims to pick different register word sizes from
address sizes, but most ports use the defaults for both (32-bits), and
the few that support multiple register sizes never change the address
size (so address defaults to register). I can't think of any machine
where the register hardware size would be larger than the address word
size either. We have ABIs that behave that way (e.g. x32), but the
hardware is still equivalent register sized.
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| .. | ||
| acinclude.m4 | ||
| aclocal.m4 | ||
| callback.c | ||
| cgen-accfp.c | ||
| cgen-cpu.h | ||
| cgen-defs.h | ||
| cgen-engine.h | ||
| cgen-fpu.c | ||
| cgen-fpu.h | ||
| cgen-mem.h | ||
| cgen-ops.h | ||
| cgen-par.c | ||
| cgen-par.h | ||
| cgen-run.c | ||
| cgen-scache.c | ||
| cgen-scache.h | ||
| cgen-sim.h | ||
| cgen-trace.c | ||
| cgen-trace.h | ||
| cgen-types.h | ||
| cgen-utils.c | ||
| cgen.sh | ||
| ChangeLog | ||
| create-version.sh | ||
| dv-cfi.c | ||
| dv-cfi.h | ||
| dv-core.c | ||
| dv-glue.c | ||
| dv-pal.c | ||
| dv-sockser.c | ||
| dv-sockser.h | ||
| gdbinit.in | ||
| genmloop.sh | ||
| gennltvals.sh | ||
| gentmap.c | ||
| hw-alloc.c | ||
| hw-alloc.h | ||
| hw-base.c | ||
| hw-base.h | ||
| hw-device.c | ||
| hw-device.h | ||
| hw-events.c | ||
| hw-events.h | ||
| hw-handles.c | ||
| hw-handles.h | ||
| hw-instances.c | ||
| hw-instances.h | ||
| hw-main.h | ||
| hw-ports.c | ||
| hw-ports.h | ||
| hw-properties.c | ||
| hw-properties.h | ||
| hw-tree.c | ||
| hw-tree.h | ||
| Make-common.in | ||
| nltvals.def | ||
| nrun.c | ||
| run.1 | ||
| sim-abort.c | ||
| sim-alu.h | ||
| sim-arange.c | ||
| sim-arange.h | ||
| sim-assert.h | ||
| sim-base.h | ||
| sim-basics.h | ||
| sim-bits.c | ||
| sim-bits.h | ||
| sim-close.c | ||
| sim-command.c | ||
| sim-config.c | ||
| sim-config.h | ||
| sim-core.c | ||
| sim-core.h | ||
| sim-cpu.c | ||
| sim-cpu.h | ||
| sim-endian.c | ||
| sim-endian.h | ||
| sim-engine.c | ||
| sim-engine.h | ||
| sim-events.c | ||
| sim-events.h | ||
| sim-fpu.c | ||
| sim-fpu.h | ||
| sim-hload.c | ||
| sim-hrw.c | ||
| sim-hw.c | ||
| sim-hw.h | ||
| sim-info.c | ||
| sim-inline.c | ||
| sim-inline.h | ||
| sim-io.c | ||
| sim-io.h | ||
| sim-load.c | ||
| sim-memopt.c | ||
| sim-memopt.h | ||
| sim-model.c | ||
| sim-model.h | ||
| sim-module.c | ||
| sim-module.h | ||
| sim-n-bits.h | ||
| sim-n-core.h | ||
| sim-n-endian.h | ||
| sim-options.c | ||
| sim-options.h | ||
| sim-profile.c | ||
| sim-profile.h | ||
| sim-reason.c | ||
| sim-reg.c | ||
| sim-resume.c | ||
| sim-run.c | ||
| sim-signal.c | ||
| sim-signal.h | ||
| sim-stop.c | ||
| sim-syscall.c | ||
| sim-syscall.h | ||
| sim-trace.c | ||
| sim-trace.h | ||
| sim-types.h | ||
| sim-utils.c | ||
| sim-utils.h | ||
| sim-watch.c | ||
| sim-watch.h | ||
| syscall.c | ||
| version.h | ||