Mike Frysinger d4e3adda12 sim: watchpoints: change sizeof_pc to sizeof(sim_cia) ... Existing ports already have sizeof_pc set to the same size as sim_cia, so simply make that part of the core code. We already assume this in places by way of sim_pc_{get,set}, and this is how it's documented in the sim-base.h API. There is code to allow sims to pick different register word sizes from address sizes, but most ports use the defaults for both (32-bits), and the few that support multiple register sizes never change the address size (so address defaults to register). I can't think of any machine where the register hardware size would be larger than the address word size either. We have ABIs that behave that way (e.g. x32), but the hardware is still equivalent register sized.		2021-01-30 10:14:21 -05:00
..
aarch64	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
arm	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
avr	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
bfin	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
bpf	sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports	2021-01-11 09:13:11 -05:00
common	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
cr16	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
cris	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
d10v	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
erc32	sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports	2021-01-11 09:13:11 -05:00
frv	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
ft32	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
h8300	sim: h8300: drop separate eightbit memory buffer	2021-01-13 21:54:00 -05:00
igen	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
iq2000	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
lm32	sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports	2021-01-11 09:13:11 -05:00
m32c	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
m32r	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
m68hc11	sim: m68hc11: stop making hardware conditional	2021-01-30 01:09:38 -05:00
mcore	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
microblaze	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
mips	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
mn10300	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
moxie	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
msp430	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
or1k	sim: or1k: fix mixing of code & decl warning	2021-01-12 04:15:28 -05:00
ppc	sim: ppc: update version script usage	2021-01-19 10:54:06 -05:00
pru	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
rl78	sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports	2021-01-11 09:13:11 -05:00
rx	sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports	2021-01-11 09:13:11 -05:00
sh	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
testsuite	sim: bfin: delete accidental ADI copyright	2021-01-18 21:30:12 -05:00
v850	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
.gitignore
ChangeLog	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00
configure	sim: common: delete configure & Makefile	2021-01-18 12:23:18 -05:00
configure.ac	sim: common: delete configure & Makefile	2021-01-18 12:23:18 -05:00
configure.tgt	sim: sh64: delete port	2021-01-09 09:29:17 -05:00
MAINTAINERS	sim: readd myself as a maintainer	2021-01-29 22:11:45 -05:00
Makefile.in	sim: common: delete configure & Makefile	2021-01-18 12:23:18 -05:00
README-HACKING	sim: watchpoints: change sizeof_pc to sizeof(sim_cia)	2021-01-30 10:14:21 -05:00