mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-27 04:52:05 +08:00
464d2b6568
Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
378 lines
9.7 KiB
C
378 lines
9.7 KiB
C
/* PREFIX_EVEX_0F10 */
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{
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{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F10_P_1) },
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{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F10_P_3) },
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},
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/* PREFIX_EVEX_0F11 */
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{
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{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F11_P_1) },
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{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F11_P_3) },
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},
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/* PREFIX_EVEX_0F12 */
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{
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{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
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{ VEX_W_TABLE (EVEX_W_0F12_P_1) },
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{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
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{ VEX_W_TABLE (EVEX_W_0F12_P_3) },
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},
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/* PREFIX_EVEX_0F16 */
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{
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{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
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{ VEX_W_TABLE (EVEX_W_0F16_P_1) },
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{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
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},
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/* PREFIX_EVEX_0F2A */
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{
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{ Bad_Opcode },
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{ "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F2A_P_3) },
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},
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/* PREFIX_EVEX_0F51 */
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{
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{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F51_P_1) },
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{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F51_P_3) },
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},
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/* PREFIX_EVEX_0F58 */
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{
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{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F58_P_1) },
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{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F58_P_3) },
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},
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/* PREFIX_EVEX_0F59 */
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{
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{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F59_P_1) },
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{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F59_P_3) },
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},
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/* PREFIX_EVEX_0F5A */
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{
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{ VEX_W_TABLE (EVEX_W_0F5A_P_0) },
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{ VEX_W_TABLE (EVEX_W_0F5A_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F5A_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F5A_P_3) },
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},
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/* PREFIX_EVEX_0F5B */
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{
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{ VEX_W_TABLE (EVEX_W_0F5B_P_0) },
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{ VEX_W_TABLE (EVEX_W_0F5B_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F5B_P_2) },
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},
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/* PREFIX_EVEX_0F5C */
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{
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{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5C_P_1) },
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{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5C_P_3) },
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},
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/* PREFIX_EVEX_0F5D */
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{
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{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5D_P_1) },
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{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5D_P_3) },
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},
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/* PREFIX_EVEX_0F5E */
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{
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{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5E_P_1) },
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{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5E_P_3) },
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},
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/* PREFIX_EVEX_0F5F */
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{
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{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5F_P_1) },
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{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0F5F_P_3) },
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},
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/* PREFIX_EVEX_0F6F */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F6F_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F6F_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F6F_P_3) },
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},
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/* PREFIX_EVEX_0F70 */
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{
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{ Bad_Opcode },
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{ "vpshufhw", { XM, EXx, Ib }, 0 },
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{ VEX_W_TABLE (EVEX_W_0F70_P_2) },
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{ "vpshuflw", { XM, EXx, Ib }, 0 },
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},
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/* PREFIX_EVEX_0F78 */
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{
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{ VEX_W_TABLE (EVEX_W_0F78_P_0) },
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{ "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 },
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{ VEX_W_TABLE (EVEX_W_0F78_P_2) },
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{ "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
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},
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/* PREFIX_EVEX_0F79 */
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{
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{ VEX_W_TABLE (EVEX_W_0F79_P_0) },
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{ "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 },
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{ VEX_W_TABLE (EVEX_W_0F79_P_2) },
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{ "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F7A */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F7A_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F7A_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F7A_P_3) },
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},
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/* PREFIX_EVEX_0F7B */
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{
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{ Bad_Opcode },
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{ "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
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{ VEX_W_TABLE (EVEX_W_0F7B_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F7B_P_3) },
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},
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/* PREFIX_EVEX_0F7E */
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{
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{ Bad_Opcode },
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{ EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1) },
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{ EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_2) },
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},
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/* PREFIX_EVEX_0F7F */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F7F_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F7F_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F7F_P_3) },
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},
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/* PREFIX_EVEX_0FC2 */
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{
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{ "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0FC2_P_1) },
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{ "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
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{ VEX_W_TABLE (EVEX_W_0FC2_P_3) },
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},
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/* PREFIX_EVEX_0FE6 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0FE6_P_1) },
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{ VEX_W_TABLE (EVEX_W_0FE6_P_2) },
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{ VEX_W_TABLE (EVEX_W_0FE6_P_3) },
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},
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/* PREFIX_EVEX_0F3810 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3810_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3810_P_2) },
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},
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/* PREFIX_EVEX_0F3811 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3811_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3811_P_2) },
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},
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/* PREFIX_EVEX_0F3812 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3812_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3812_P_2) },
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},
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/* PREFIX_EVEX_0F3813 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3813_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3813_P_2) },
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},
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/* PREFIX_EVEX_0F3814 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3814_P_1) },
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{ "vprorv%DQ", { XM, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3815 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3815_P_1) },
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{ "vprolv%DQ", { XM, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3820 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3820_P_1) },
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{ "vpmovsxbw", { XM, EXxmmq }, 0 },
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},
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/* PREFIX_EVEX_0F3821 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3821_P_1) },
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{ "vpmovsxbd", { XM, EXxmmqd }, 0 },
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},
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/* PREFIX_EVEX_0F3822 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3822_P_1) },
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{ "vpmovsxbq", { XM, EXxmmdw }, 0 },
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},
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/* PREFIX_EVEX_0F3823 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3823_P_1) },
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{ "vpmovsxwd", { XM, EXxmmq }, 0 },
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},
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/* PREFIX_EVEX_0F3824 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3824_P_1) },
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{ "vpmovsxwq", { XM, EXxmmqd }, 0 },
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},
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/* PREFIX_EVEX_0F3825 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3825_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3825_P_2) },
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},
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/* PREFIX_EVEX_0F3826 */
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{
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{ Bad_Opcode },
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{ "vptestnm%BW", { XMask, Vex, EXx }, 0 },
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{ "vptestm%BW", { XMask, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3827 */
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{
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{ Bad_Opcode },
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{ "vptestnm%DQ", { XMask, Vex, EXx }, 0 },
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{ "vptestm%DQ", { XMask, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3828 */
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{
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{ Bad_Opcode },
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{ MOD_TABLE (MOD_EVEX_0F3828_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3828_P_2) },
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},
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/* PREFIX_EVEX_0F3829 */
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{
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{ Bad_Opcode },
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{ "vpmov%BW2m", { XMask, EXx }, 0 },
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{ VEX_W_TABLE (EVEX_W_0F3829_P_2) },
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},
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/* PREFIX_EVEX_0F382A */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F382A_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F382A_P_2) },
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},
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/* PREFIX_EVEX_0F3830 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3830_P_1) },
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{ "vpmovzxbw", { XM, EXxmmq }, 0 },
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},
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/* PREFIX_EVEX_0F3831 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3831_P_1) },
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{ "vpmovzxbd", { XM, EXxmmqd }, 0 },
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},
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/* PREFIX_EVEX_0F3832 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3832_P_1) },
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{ "vpmovzxbq", { XM, EXxmmdw }, 0 },
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},
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/* PREFIX_EVEX_0F3833 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3833_P_1) },
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{ "vpmovzxwd", { XM, EXxmmq }, 0 },
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},
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/* PREFIX_EVEX_0F3834 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3834_P_1) },
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{ "vpmovzxwq", { XM, EXxmmqd }, 0 },
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},
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/* PREFIX_EVEX_0F3835 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3835_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3835_P_2) },
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},
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/* PREFIX_EVEX_0F3838 */
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{
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{ Bad_Opcode },
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{ MOD_TABLE (MOD_EVEX_0F3838_P_1) },
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{ "vpminsb", { XM, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3839 */
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{
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{ Bad_Opcode },
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{ "vpmov%DQ2m", { XMask, EXx }, 0 },
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{ "vpmins%DQ", { XM, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F383A */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F383A_P_1) },
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{ "vpminuw", { XM, Vex, EXx }, 0 },
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},
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/* PREFIX_EVEX_0F3852 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3852_P_1) },
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{ "vpdpwssd", { XM, Vex, EXx }, 0 },
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{ "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
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},
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/* PREFIX_EVEX_0F3853 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vpdpwssds", { XM, Vex, EXx }, 0 },
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{ "vp4dpwssds", { XM, Vex, EXxmm }, 0 },
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},
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/* PREFIX_EVEX_0F3868 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
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},
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/* PREFIX_EVEX_0F3872 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3872_P_1) },
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{ VEX_W_TABLE (EVEX_W_0F3872_P_2) },
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{ VEX_W_TABLE (EVEX_W_0F3872_P_3) },
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},
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/* PREFIX_EVEX_0F389A */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
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{ "v4fmaddps", { XM, Vex, Mxmm }, 0 },
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},
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/* PREFIX_EVEX_0F389B */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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{ "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
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},
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/* PREFIX_EVEX_0F38AA */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
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{ "v4fnmaddps", { XM, Vex, Mxmm }, 0 },
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},
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/* PREFIX_EVEX_0F38AB */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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{ "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
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},
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