Jozef Lawrynowicz b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction ... The MSP430X RRUX instruction (unsigned right shift) is synthesized as the RRC (rotate right through carry) instruction, but with the ZC (zero carry) bit of the opcode extention word set. Ensure the carry flag is ignored when the ZC bit is set. sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * msp430-sim.c (msp430_step_once): Ignore the carry flag when executing an RRC instruction, if the ZC bit of the extension word is set. sim/testsuite/sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * rrux.s: New test.		2020-01-22 21:52:29 +00:00
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common	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00
config
d10v-elf	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00
frv-elf	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00
lib
m32r-elf	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00
mips64el-elf	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00
sim	MSP430: Fix simulator execution of RRUX instruction	2020-01-22 21:52:29 +00:00
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ChangeLog
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Makefile.in	Update copyright year range in all GDB files.	2020-01-01 10:20:53 +04:00