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90b6238f06
More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
26 lines
1.3 KiB
Makefile
26 lines
1.3 KiB
Makefile
#source: stm32l4xx-cannot-fix-far-ldm.s
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#as:-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16
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#ld:-EL --fix-stm32l4xx-629360 -Ttext=0x80000
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: STM32L4XX erratum : LDM cannot be patched when LDM is too far from veneer section
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#warning: .*cannot create STM32L4XX veneer; jump out of range by 24 bytes; cannot encode branch instruction.*
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# Test the `LDM*' instructions when too far from the veneer section
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# They cannot, thus should not, be patched
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.*: +file format .*arm.*
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Disassembly of section \.text:
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00080000 <__stm32l4xx_veneer_0> 4607[[:space:]]+mov[[:space:]]+r7, r0
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00080002 <__stm32l4xx_veneer_0\+0x2> e8b7 007e[[:space:]]+ldmia\.w[[:space:]]+r7\!, {r1, r2, r3, r4, r5, r6}
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00080006 <__stm32l4xx_veneer_0\+0x6> e897 0380[[:space:]]+ldmia\.w[[:space:]]+r7, {r7, r8, r9}
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0008000a <__stm32l4xx_veneer_0\+0xa> f3ff 978b[[:space:]]+b\.w[[:space:]]+0107ff24 <__stm32l4xx_veneer_0_r>
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0008000e <__stm32l4xx_veneer_0\+0xe> de00[[:space:]]+udf[[:space:]]+#0
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\.\.\.
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\.\.\.
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0107ff20 <_start\+0xffff00> f400 906e[[:space:]]+b\.w[[:space:]]+00080000 <__stm32l4xx_veneer_0>
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\.\.\.
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01080024 <__stm32l4xx_veneer_0_r\+0x100> e899 03fe[[:space:]]+ldmia\.w[[:space:]]+r9, {r1, r2, r3, r4, r5, r6, r7, r8, r9}
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01080028 <__stm32l4xx_veneer_1_r> bf00[[:space:]]+nop
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