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https://sourceware.org/git/binutils-gdb.git
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6d30f5b2dc
(_bfd_mips_elf_size_dynamic_sections): For CPUs without load
interlocking, the last PLT entry needs a nop in the branch delay slot.
(_bfd_mips_elf_finish_dynamic_symbol): For CPUs with load itnerlocking,
output the last two PLT entries in reverse order.
* ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-6-o32.dd: Updated to use new PLT entries.
102 lines
2.5 KiB
Plaintext
102 lines
2.5 KiB
Plaintext
# GOT layout:
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#
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# -32752: lazy resolution function
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# -32748: reserved for module pointer
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# -32744: extf2's GOT entry (undefined 0)
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# -32740: extf3's GOT entry (PLT entry)
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# -32736: extd2's GOT entry (copy reloc)
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# -32732: extf1's GOT entry (.MIPS.stubs entry)
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# -32728: extd1's GOT entry (undefined 0)
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# -32724: extf4's GOT entry (PLT entry)
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# -32620: extd4's GOT entry (undefined 0, reloc only)
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.*
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Disassembly of section \.plt:
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00043040 <.*>:
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.*: 3c1c0008 lui gp,0x8
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.*: 8f991000 lw t9,4096\(gp\)
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.*: 279c1000 addiu gp,gp,4096
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.*: 031cc023 subu t8,t8,gp
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.*: 03e07821 move t7,ra
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.*: 0018c082 srl t8,t8,0x2
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.*: 0320f809 jalr t9
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.*: 2718fffe addiu t8,t8,-2
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00043060 <extf4@plt>:
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.*: 3c0f0008 lui t7,0x8
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.*: 8df91008 lw t9,4104\(t7\)
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.*: 03200008 jr t9
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.*: 25f81008 addiu t8,t7,4104
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00043070 <extf5@plt>:
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.*: 3c0f0008 lui t7,0x8
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.*: 8df9100c lw t9,4108\(t7\)
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.*: 03200008 jr t9
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.*: 25f8100c addiu t8,t7,4108
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00043080 <extf3@plt>:
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.*: 3c0f0008 lui t7,0x8
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.*: 8df91010 lw t9,4112\(t7\)
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.*: 03200008 jr t9
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.*: 25f81010 addiu t8,t7,4112
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Disassembly of section \.text:
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00044000 <.*>:
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\.\.\.
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00044008 <\.pic\.f1>:
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44008: 3c190004 lui t9,0x4
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4400c: 27394010 addiu t9,t9,16400
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00044010 <f1>:
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44010: 0c011013 jal 4404c <f3>
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44014: 3c020004 lui v0,0x4
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44018: 03e00008 jr ra
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4401c: 24424020 addiu v0,v0,16416
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00044020 <f2>:
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44020: 3c1c0006 lui gp,0x6
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44024: 279c3fd0 addiu gp,gp,16336
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44028: 0399e021 addu gp,gp,t9
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4402c: 8f998024 lw t9,-32732\(gp\)
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44030: 8f848018 lw a0,-32744\(gp\)
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44034: 8f858028 lw a1,-32728\(gp\)
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44038: 0320f809 jalr t9
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4403c: 8f868020 lw a2,-32736\(gp\)
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44040: 8f99801c lw t9,-32740\(gp\)
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44044: 03200008 jr t9
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44048: 8f84802c lw a0,-32724\(gp\)
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0004404c <f3>:
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4404c: 03e00008 jr ra
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44050: 00000000 nop
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\.\.\.
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00044060 <__start>:
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44060: 0c011002 jal 44008 <\.pic\.f1>
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44064: 00000000 nop
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44068: 3c020004 lui v0,0x4
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4406c: 24424020 addiu v0,v0,16416
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44070: 0c010c20 jal 43080 <extf3@plt>
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44074: 00000000 nop
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44078: 0c010c18 jal 43060 <extf4@plt>
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4407c: 00000000 nop
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44080: 0c010c1c jal 43070 <extf5@plt>
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44084: 00000000 nop
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44088: 3c02000a lui v0,0xa
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4408c: 24422000 addiu v0,v0,8192
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44090: 3c02000a lui v0,0xa
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44094: 24422018 addiu v0,v0,8216
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\.\.\.
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Disassembly of section \.MIPS\.stubs:
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000440a0 <\.MIPS\.stubs>:
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440a0: 8f998010 lw t9,-32752\(gp\)
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440a4: 03e07821 move t7,ra
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440a8: 0320f809 jalr t9
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440ac: 2418000a li t8,10
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\.\.\.
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