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When there are both PLT and GOT references to the same function symbol, linker combines GOTPLT and GOT slots into a single GOT slot and create an entry in .plt.got section for PLT access via the GOT slot. This patch adds unwind info for .plt.got section. bfd/ PR ld/20830 * elf32-i386.c (elf_i386_eh_frame_plt_got): New. (PLT_GOT_FDE_LENGTH): Likewise. (elf_i386_plt_layout): Add eh_frame_plt_got and eh_frame_plt_got_size. (elf_i386_plt): Updated. (elf_i386_link_hash_table): Add plt_got_eh_frame. (elf_i386_check_relocs): Create .eh_frame section for .plt.got. (elf_i386_size_dynamic_sections): Allocate and initialize .eh_frame section for .plt.got. (elf_i386_finish_dynamic_sections): Adjust .eh_frame section for .plt.got. (elf_i386_nacl_plt): Add FIXME for eh_frame_plt_got and eh_frame_plt_got_size. * elf64-x86-64.c (elf_x86_64_eh_frame_plt_got): New. (PLT_GOT_FDE_LENGTH): Likewise. (elf_x86_64_backend_data): Add eh_frame_plt_got and eh_frame_plt_got_size. (elf_x86_64_arch_bed): Updated. (elf_x86_64_bnd_arch_bed): Add FIXME for eh_frame_plt_got and eh_frame_plt_got_size. (elf_x86_64_nacl_arch_bed): Likewise. (elf_x86_64_link_hash_table): Add plt_got_eh_frame. (elf_x86_64_check_relocs): Create .eh_frame section for .plt.got. (elf_x86_64_size_dynamic_sections): Allocate and initialize .eh_frame section for .plt.got. (elf_x86_64_finish_dynamic_sections): Adjust .eh_frame section for .plt.got. ld/ PR ld/20830 * testsuite/ld-i386/i386.exp: Run pr20830. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/pr20830.d: New file. * testsuite/ld-i386/pr20830.s: Likewise. * testsuite/ld-x86-64/pr20830.d: Likewise. * testsuite/ld-x86-64/pr20830.s: Likewise.
61 lines
1.5 KiB
Makefile
61 lines
1.5 KiB
Makefile
#name: PR ld/20830 (.plt.got)
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#as: --32
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#ld: -melf_i386 -shared -z relro --ld-generated-unwind-info
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#objdump: -dw -Wf
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.*: +file format .*
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Contents of the .eh_frame section:
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0+ 00000014 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: 1
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Data alignment factor: -4
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Return address column: 8
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Augmentation data: 1b
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DW_CFA_def_cfa: r4 \(esp\) ofs 4
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DW_CFA_offset: r8 \(eip\) at cfa-4
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DW_CFA_nop
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DW_CFA_nop
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0+18 00000010 0000001c FDE cie=00000000 pc=00000188..00000193
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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0+2c 00000020 00000030 FDE cie=00000000 pc=00000170..00000180
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DW_CFA_def_cfa_offset: 8
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DW_CFA_advance_loc: 6 to 00000176
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DW_CFA_def_cfa_offset: 12
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DW_CFA_advance_loc: 10 to 00000180
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DW_CFA_def_cfa_expression \(DW_OP_breg4 \(esp\): 4; DW_OP_breg8 \(eip\): 0; DW_OP_lit15; DW_OP_and; DW_OP_lit11; DW_OP_ge; DW_OP_lit2; DW_OP_shl; DW_OP_plus\)
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0+50 00000010 00000054 FDE cie=00000000 pc=00000180..00000188
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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Disassembly of section .plt:
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0+170 <.plt>:
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+[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
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+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
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+[a-f0-9]+: 00 00 add %al,\(%eax\)
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...
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Disassembly of section .plt.got:
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0+180 <.plt.got>:
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+[a-f0-9]+: ff a3 fc ff ff ff jmp \*-0x4\(%ebx\)
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+[a-f0-9]+: 66 90 xchg %ax,%ax
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Disassembly of section .text:
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0+188 <foo>:
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+[a-f0-9]+: e8 f3 ff ff ff call 180 <.plt.got>
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+[a-f0-9]+: 8b 83 fc ff ff ff mov -0x4\(%ebx\),%eax
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#pass
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