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541 lines
15 KiB
C
541 lines
15 KiB
C
/* This file is part of the program psim.
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Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _INTERRUPTS_C_
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#define _INTERRUPTS_C_
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#include <signal.h>
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#include "cpu.h"
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#include "idecode.h"
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#include "os_emul.h"
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/* Operating environment support code
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Unlike the VEA, the OEA must fully model the effect an interrupt
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has on the processors state.
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Each function below return updated values for registers effected by
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interrupts */
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STATIC_INLINE_INTERRUPTS\
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(msreg)
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interrupt_msr(msreg old_msr,
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msreg msr_clear,
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msreg msr_set)
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{
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msreg msr_set_to_0 = (msr_branch_trace_enable
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| msr_data_relocate
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| msr_external_interrupt_enable
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| msr_floating_point_exception_mode_0
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| msr_floating_point_exception_mode_1
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| msr_floating_point_available
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| msr_instruction_relocate
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| msr_power_management_enable
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| msr_problem_state
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| msr_recoverable_interrupt
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| msr_single_step_trace_enable);
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/* remember, in 32bit mode msr_64bit_mode is zero */
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msreg new_msr = ((((old_msr & ~msr_set_to_0)
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| msr_64bit_mode)
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& ~msr_clear)
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| msr_set);
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return new_msr;
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}
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STATIC_INLINE_INTERRUPTS\
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(msreg)
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interrupt_srr1(msreg old_msr,
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msreg srr1_clear,
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msreg srr1_set)
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{
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spreg srr1_mask = (MASK(0,32)
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| MASK(37, 41)
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| MASK(48, 63));
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spreg srr1 = (old_msr & srr1_mask & ~srr1_clear) | srr1_set;
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return srr1;
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}
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STATIC_INLINE_INTERRUPTS\
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(unsigned_word)
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interrupt_base_ea(msreg msr)
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{
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if (msr & msr_interrupt_prefix)
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return MASK(0, 43);
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else
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return 0;
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}
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/* finish off an interrupt for the OEA model, updating all registers
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and forcing a restart of the processor */
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STATIC_INLINE_INTERRUPTS\
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(unsigned_word)
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perform_oea_interrupt(cpu *processor,
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unsigned_word cia,
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unsigned_word vector_offset,
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msreg msr_clear,
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msreg msr_set,
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msreg srr1_clear,
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msreg srr1_set)
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{
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msreg old_msr = MSR;
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msreg new_msr = interrupt_msr(old_msr, msr_clear, msr_set);
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unsigned_word nia;
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if (!(old_msr & msr_recoverable_interrupt)) {
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cpu_error(processor, cia,
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"double interrupt - MSR[RI] bit clear when attempting to deliver interrupt, cia=0x%lx, msr=0x%lx; srr0=0x%lx(cia), srr1=0x%lx(msr); trap-vector=0x%lx, trap-msr=0x%lx",
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(unsigned long)cia,
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(unsigned long)old_msr,
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(unsigned long)SRR0,
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(unsigned long)SRR1,
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(unsigned long)vector_offset,
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(unsigned long)new_msr);
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}
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SRR0 = (spreg)(cia);
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SRR1 = interrupt_srr1(old_msr, srr1_clear, srr1_set);
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MSR = new_msr;
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nia = interrupt_base_ea(new_msr) + vector_offset;
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cpu_synchronize_context(processor, cia);
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return nia;
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}
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INLINE_INTERRUPTS\
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(void)
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machine_check_interrupt(cpu *processor,
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unsigned_word cia)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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cpu_error(processor, cia, "machine-check interrupt");
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case OPERATING_ENVIRONMENT:
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TRACE(trace_interrupts, ("machine-check interrupt - cia=0x%lx\n",
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(unsigned long)cia));
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cia = perform_oea_interrupt(processor, cia, 0x00200, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - machine_check_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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data_storage_interrupt(cpu *processor,
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unsigned_word cia,
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unsigned_word ea,
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storage_interrupt_reasons reason,
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int is_store)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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error("internal error - data_storage_interrupt - should not be called in VEA mode");
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break;
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case OPERATING_ENVIRONMENT:
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{
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spreg direction = (is_store ? dsisr_store_operation : 0);
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switch (reason) {
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case direct_store_storage_interrupt:
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DSISR = dsisr_direct_store_error_exception | direction;
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break;
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case hash_table_miss_storage_interrupt:
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DSISR = dsisr_hash_table_or_dbat_miss | direction;
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break;
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case protection_violation_storage_interrupt:
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DSISR = dsisr_protection_violation | direction;
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break;
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case earwax_violation_storage_interrupt:
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DSISR = dsisr_earwax_violation | direction;
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break;
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case segment_table_miss_storage_interrupt:
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DSISR = dsisr_segment_table_miss | direction;
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break;
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case earwax_disabled_storage_interrupt:
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DSISR = dsisr_earwax_disabled | direction;
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break;
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default:
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error("internal error - data_storage_interrupt - reason %d not implemented", reason);
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break;
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}
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DAR = (spreg)ea;
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TRACE(trace_interrupts, ("data storage interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
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(unsigned long)cia,
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(unsigned long)DAR,
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(unsigned long)DSISR));
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cia = perform_oea_interrupt(processor, cia, 0x00300, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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}
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default:
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error("internal error - data_storage_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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instruction_storage_interrupt(cpu *processor,
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unsigned_word cia,
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storage_interrupt_reasons reason)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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error("internal error - instruction_storage_interrupt - should not be called in VEA mode");
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case OPERATING_ENVIRONMENT:
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{
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msreg srr1_set;
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switch(reason) {
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case hash_table_miss_storage_interrupt:
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srr1_set = srr1_hash_table_or_ibat_miss;
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break;
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case direct_store_storage_interrupt:
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srr1_set = srr1_direct_store_error_exception;
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break;
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case protection_violation_storage_interrupt:
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srr1_set = srr1_protection_violation;
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break;
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case segment_table_miss_storage_interrupt:
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srr1_set = srr1_segment_table_miss;
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break;
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default:
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srr1_set = 0;
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error("internal error - instruction_storage_interrupt - reason %d not implemented");
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break;
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}
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TRACE(trace_interrupts, ("instruction storage interrupt - cia=0x%lx SRR1|=0x%lx\n",
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(unsigned long)cia,
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(unsigned long)srr1_set));
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cia = perform_oea_interrupt(processor, cia, 0x00400, 0, 0, 0, srr1_set);
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cpu_restart(processor, cia);
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}
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default:
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error("internal error - instruction_storage_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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alignment_interrupt(cpu *processor,
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unsigned_word cia,
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unsigned_word ra)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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cpu_error(processor, cia, "alignment interrupt - ra=0x%lx", ra);
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case OPERATING_ENVIRONMENT:
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DAR = (spreg)ra;
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DSISR = 0; /* FIXME */
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TRACE(trace_interrupts, ("alignment interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
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(unsigned long)cia,
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(unsigned long)DAR,
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(unsigned long)DSISR));
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cia = perform_oea_interrupt(processor, cia, 0x00600, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - alignment_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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program_interrupt(cpu *processor,
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unsigned_word cia,
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program_interrupt_reasons reason)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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switch (reason) {
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case floating_point_enabled_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"floating point enabled");
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break;
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case illegal_instruction_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"illegal instruction");
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break;
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case privileged_instruction_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"privileged instruction");
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break;
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case trap_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"trap");
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break;
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case optional_instruction_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"illegal instruction (optional instruction not supported)");
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break;
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case mpc860c0_instruction_program_interrupt:
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cpu_error(processor, cia, "program interrupt - %s",
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"problematic branch detected, see MPC860 C0 errata");
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break;
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default:
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error("internal error - program_interrupt - reason %d not implemented", reason);
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}
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case OPERATING_ENVIRONMENT:
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{
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msreg srr1_set;
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switch (reason) {
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case floating_point_enabled_program_interrupt:
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srr1_set = srr1_floating_point_enabled;
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break;
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case optional_instruction_program_interrupt:
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case illegal_instruction_program_interrupt:
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srr1_set = srr1_illegal_instruction;
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break;
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case privileged_instruction_program_interrupt:
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srr1_set = srr1_priviliged_instruction;
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break;
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case trap_program_interrupt:
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srr1_set = srr1_trap;
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break;
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case mpc860c0_instruction_program_interrupt:
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srr1_set = 0;
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cpu_error(processor, cia, "program interrupt - %s",
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"problematic branch detected, see MPC860 C0 errata");
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break;
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default:
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srr1_set = 0;
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error("internal error - program_interrupt - reason %d not implemented", reason);
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break;
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}
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TRACE(trace_interrupts, ("program interrupt - cia=0x%lx SRR1|=0x%lx\n",
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(unsigned long)cia,
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(unsigned long)srr1_set));
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cia = perform_oea_interrupt(processor, cia, 0x00700, 0, 0, 0, srr1_set);
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cpu_restart(processor, cia);
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}
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default:
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error("internal error - program_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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floating_point_unavailable_interrupt(cpu *processor,
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unsigned_word cia)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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cpu_error(processor, cia, "floating-point unavailable interrupt");
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case OPERATING_ENVIRONMENT:
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TRACE(trace_interrupts, ("floating-point unavailable interrupt - cia=0x%lx\n",
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(unsigned long)cia));
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cia = perform_oea_interrupt(processor, cia, 0x00800, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - floating_point_unavailable_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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system_call_interrupt(cpu *processor,
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unsigned_word cia)
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{
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TRACE(trace_interrupts, ("system-call interrupt - cia=0x%lx\n", (unsigned long)cia));
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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os_emul_system_call(processor, cia);
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cpu_restart(processor, cia+4);
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case OPERATING_ENVIRONMENT:
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cia = perform_oea_interrupt(processor, cia+4, 0x00c00, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - system_call_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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floating_point_assist_interrupt(cpu *processor,
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unsigned_word cia)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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cpu_error(processor, cia, "floating-point assist interrupt");
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case OPERATING_ENVIRONMENT:
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TRACE(trace_interrupts, ("floating-point assist interrupt - cia=0x%lx\n", (unsigned long)cia));
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cia = perform_oea_interrupt(processor, cia, 0x00e00, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - floating_point_assist_interrupt - bad switch");
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}
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}
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/* handle an externally generated event or an interrupt that has just
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been enabled through changes to the MSR. */
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STATIC_INLINE_INTERRUPTS\
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(void)
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deliver_hardware_interrupt(void *data)
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{
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cpu *processor = (cpu*)data;
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interrupts *ints = cpu_interrupts(processor);
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ints->delivery_scheduled = NULL;
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if ((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
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| msr_floating_point_exception_mode_1))
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&& cpu_registers(processor)->fpscr & fpscr_fex) {
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msreg srr1_set = srr1_floating_point_enabled | srr1_subsequent_instruction;
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unsigned_word cia = cpu_get_program_counter(processor);
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unsigned_word nia = perform_oea_interrupt(processor,
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cia, 0x00700, 0, 0, 0, srr1_set);
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cpu_set_program_counter(processor, nia);
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}
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else if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
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/* external interrupts have a high priority and remain pending */
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if (ints->pending_interrupts & external_interrupt_pending) {
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unsigned_word cia = cpu_get_program_counter(processor);
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unsigned_word nia = perform_oea_interrupt(processor,
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cia, 0x00500, 0, 0, 0, 0);
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TRACE(trace_interrupts, ("external interrupt - cia=0x%lx\n", (unsigned long)cia));
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cpu_set_program_counter(processor, nia);
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}
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/* decrementer interrupts have a lower priority and are once only */
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else if (ints->pending_interrupts & decrementer_interrupt_pending) {
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unsigned_word cia = cpu_get_program_counter(processor);
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unsigned_word nia = perform_oea_interrupt(processor,
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cia, 0x00900, 0, 0, 0, 0);
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TRACE(trace_interrupts, ("decrementer interrupt - cia 0x%lx, time %ld\n",
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(unsigned long)cia,
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(unsigned long)event_queue_time(psim_event_queue(cpu_system(processor)))
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));
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cpu_set_program_counter(processor, nia);
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ints->pending_interrupts &= ~decrementer_interrupt_pending;
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}
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}
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}
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STATIC_INLINE_INTERRUPTS\
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(void)
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schedule_hardware_interrupt_delivery(cpu *processor)
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{
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interrupts *ints = cpu_interrupts(processor);
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if (ints->delivery_scheduled == NULL) {
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ints->delivery_scheduled =
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event_queue_schedule(psim_event_queue(cpu_system(processor)),
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0, deliver_hardware_interrupt, processor);
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}
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}
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INLINE_INTERRUPTS\
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(void)
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check_masked_interrupts(cpu *processor)
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{
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if (((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
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| msr_floating_point_exception_mode_1))
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&& cpu_registers(processor)->fpscr & fpscr_fex)
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|| ((cpu_registers(processor)->msr & msr_external_interrupt_enable)
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&& (cpu_interrupts(processor)->pending_interrupts)))
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schedule_hardware_interrupt_delivery(processor);
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}
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INLINE_INTERRUPTS\
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(void)
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decrementer_interrupt(cpu *processor)
|
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{
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interrupts *ints = cpu_interrupts(processor);
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ints->pending_interrupts |= decrementer_interrupt_pending;
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if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
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schedule_hardware_interrupt_delivery(processor);
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|
}
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|
}
|
|
|
|
INLINE_INTERRUPTS\
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|
(void)
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|
external_interrupt(cpu *processor,
|
|
int is_asserted)
|
|
{
|
|
interrupts *ints = cpu_interrupts(processor);
|
|
if (is_asserted) {
|
|
if (!(ints->pending_interrupts & external_interrupt_pending)) {
|
|
ints->pending_interrupts |= external_interrupt_pending;
|
|
if (cpu_registers(processor)->msr & msr_external_interrupt_enable)
|
|
schedule_hardware_interrupt_delivery(processor);
|
|
}
|
|
else {
|
|
/* check that we haven't missed out on a chance to deliver an
|
|
interrupt */
|
|
ASSERT(!(cpu_registers(processor)->msr & msr_external_interrupt_enable));
|
|
}
|
|
}
|
|
else {
|
|
ints->pending_interrupts &= ~external_interrupt_pending;
|
|
}
|
|
}
|
|
|
|
#endif /* _INTERRUPTS_C_ */
|