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5d6255fea6
* config/tc-mcore.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-openrisc.c: Likewise. * config/tc-or32.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-sh64.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-xstormy16.h: Likewise.
503 lines
12 KiB
C
503 lines
12 KiB
C
/* tc-openrisc.c -- Assembler for the OpenRISC family.
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Copyright (C) 2001, 2002 Free Software Foundation.
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Contributed by Johan Rydberg, jrydberg@opencores.org
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "as.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/openrisc-desc.h"
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#include "opcodes/openrisc-opc.h"
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#include "cgen.h"
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct openrisc_insn openrisc_insn;
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struct openrisc_insn
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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};
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const char comment_chars[] = "#";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = ";";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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#define OPENRISC_SHORTOPTS "m:"
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const char * md_shortopts = OPENRISC_SHORTOPTS;
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struct option md_longopts[] =
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{
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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unsigned long openrisc_machine = 0; /* default */
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int
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md_parse_option (c, arg)
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int c ATTRIBUTE_UNUSED;
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char * arg ATTRIBUTE_UNUSED;
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{
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return 0;
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}
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void
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md_show_usage (stream)
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FILE * stream ATTRIBUTE_UNUSED;
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{
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}
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static void
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ignore_pseudo (val)
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int val ATTRIBUTE_UNUSED;
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{
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discard_rest_of_line ();
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}
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const char openrisc_comment_chars [] = ";#";
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "word", cons, 4 },
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{ "proc", ignore_pseudo, 0 },
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{ "endproc", ignore_pseudo, 0 },
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{ NULL, NULL, 0 }
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};
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void
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md_begin ()
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_BIG,
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CGEN_CPU_OPEN_END);
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openrisc_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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}
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void
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md_assemble (str)
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char * str;
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{
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static int last_insn_had_delay_slot = 0;
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openrisc_insn insn;
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char * errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = openrisc_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad (errmsg);
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return;
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
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#if 0 /* Currently disabled */
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/* Warn about invalid insns in delay slots. */
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if (last_insn_had_delay_slot
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&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
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as_warn (_("Instruction %s not allowed in a delay slot."),
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CGEN_INSN_NAME (insn.insn));
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#endif
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last_insn_had_delay_slot
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= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
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}
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/* The syntax in the manual says constants begin with '#'.
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We just ignore it. */
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void
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md_operand (expressionP)
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expressionS * expressionP;
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{
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if (* input_line_pointer == '#')
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{
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input_line_pointer ++;
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expression (expressionP);
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}
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}
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valueT
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md_section_align (segment, size)
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segT segment;
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valueT size;
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
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}
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symbolS *
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md_undefined_symbol (name)
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char * name ATTRIBUTE_UNUSED;
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{
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return 0;
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}
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/* Interface to relax_segment. */
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/* FIXME: Look through this. */
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const relax_typeS md_relax_table[] =
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{
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/* The fields are:
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1) most positive reach of this state,
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2) most negative reach of this state,
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3) how many bytes this mode will add to the size of the current frag
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4) which index into the table to try if we can't fit into this one. */
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/* The first entry must be unused because an `rlx_more' value of zero ends
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each list. */
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{1, 1, 0, 0},
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/* The displacement used by GAS is from the end of the 2 byte insn,
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so we subtract 2 from the following. */
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/* 16 bit insn, 8 bit disp -> 10 bit range.
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This doesn't handle a branch in the right slot at the border:
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the "& -4" isn't taken into account. It's not important enough to
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complicate things over it, so we subtract an extra 2 (or + 2 in -ve
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case). */
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{511 - 2 - 2, -512 - 2 + 2, 0, 2 },
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/* 32 bit insn, 24 bit disp -> 26 bit range. */
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{0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
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/* Same thing, but with leading nop for alignment. */
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{0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
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};
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long
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openrisc_relax_frag (segment, fragP, stretch)
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segT segment;
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fragS * fragP;
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long stretch;
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{
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/* Address of branch insn. */
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long address = fragP->fr_address + fragP->fr_fix - 2;
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long growth = 0;
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/* Keep 32 bit insns aligned on 32 bit boundaries. */
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if (fragP->fr_subtype == 2)
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{
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if ((address & 3) != 0)
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{
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fragP->fr_subtype = 3;
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growth = 2;
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}
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}
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else if (fragP->fr_subtype == 3)
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{
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if ((address & 3) == 0)
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{
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fragP->fr_subtype = 2;
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growth = -2;
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}
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}
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else
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{
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growth = relax_frag (segment, fragP, stretch);
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/* Long jump on odd halfword boundary? */
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if (fragP->fr_subtype == 2 && (address & 3) != 0)
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{
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fragP->fr_subtype = 3;
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growth += 2;
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}
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}
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return growth;
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}
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/* Return an initial guess of the length by which a fragment must grow to
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hold a branch to reach its destination.
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Also updates fr_type/fr_subtype as necessary.
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Called just before doing relaxation.
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Any symbol that is now undefined will not become defined.
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The guess for fr_var is ACTUALLY the growth beyond fr_fix.
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Whatever we do to grow fr_fix or fr_var contributes to our returned value.
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Although it may not be explicit in the frag, pretend fr_var starts with a
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0 value. */
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int
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md_estimate_size_before_relax (fragP, segment)
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fragS * fragP;
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segT segment;
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{
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/* The only thing we have to handle here are symbols outside of the
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current segment. They may be undefined or in a different segment in
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which case linker scripts may place them anywhere.
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However, we can't finish the fragment here and emit the reloc as insn
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alignment requirements may move the insn about. */
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if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
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{
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/* The symbol is undefined in this segment.
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Change the relaxation subtype to the max allowable and leave
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all further handling to md_convert_frag. */
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fragP->fr_subtype = 2;
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{
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const CGEN_INSN * insn;
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int i;
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/* Update the recorded insn.
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Fortunately we don't have to look very far.
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FIXME: Change this to record in the instruction the next higher
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relaxable insn to use. */
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for (i = 0, insn = fragP->fr_cgen.insn; i < 4; i++, insn++)
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{
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if ((strcmp (CGEN_INSN_MNEMONIC (insn),
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CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
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== 0)
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&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
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break;
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}
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if (i == 4)
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abort ();
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fragP->fr_cgen.insn = insn;
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return 2;
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}
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}
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return md_relax_table[fragP->fr_subtype].rlx_length;
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}
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/* *fragP has been relaxed to its final size, and now needs to have
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the bytes inside it modified to conform to the new size.
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Called after relaxation is finished.
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fragP->fr_type == rs_machine_dependent.
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fragP->fr_subtype is the subtype of what the address relaxed to. */
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void
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md_convert_frag (abfd, sec, fragP)
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bfd * abfd ATTRIBUTE_UNUSED;
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segT sec ATTRIBUTE_UNUSED;
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fragS * fragP ATTRIBUTE_UNUSED;
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{
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/* FIXME */
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}
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/* Functions concerning relocs. */
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/* The location from which a PC relative jump should be calculated,
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given a PC relative reloc. */
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long
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md_pcrel_from_section (fixP, sec)
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fixS * fixP;
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segT sec;
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{
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if (fixP->fx_addsy != (symbolS *) NULL
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&& (! S_IS_DEFINED (fixP->fx_addsy)
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|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
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{
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/* The symbol is undefined (or is defined but not in this section).
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Let the linker figure it out. */
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return 0;
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}
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return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (insn, operand, fixP)
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const CGEN_INSN * insn ATTRIBUTE_UNUSED;
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const CGEN_OPERAND * operand;
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fixS * fixP;
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{
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bfd_reloc_code_real_type type;
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switch (operand->type)
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{
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case OPENRISC_OPERAND_ABS_26:
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fixP->fx_pcrel = 0;
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type = BFD_RELOC_OPENRISC_ABS_26;
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goto emit;
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case OPENRISC_OPERAND_DISP_26:
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fixP->fx_pcrel = 1;
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type = BFD_RELOC_OPENRISC_REL_26;
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goto emit;
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case OPENRISC_OPERAND_HI16:
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type = BFD_RELOC_HI16;
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goto emit;
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case OPENRISC_OPERAND_LO16:
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type = BFD_RELOC_LO16;
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goto emit;
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emit:
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return type;
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default : /* avoid -Wall warning */
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break;
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}
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return BFD_RELOC_NONE;
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}
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/* See whether we need to force a relocation into the output file.
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This is used to force out switch and PC relative relocations when
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relaxing. */
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int
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openrisc_force_relocation (fix)
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fixS * fix ATTRIBUTE_UNUSED;
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{
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if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
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|| fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
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return 1;
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return 0;
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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void
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md_number_to_chars (buf, val, n)
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char * buf;
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valueT val;
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int n;
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{
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number_to_chars_bigendian (buf, val, n);
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}
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/* Turn a string in input_line_pointer into a floating point constant of type
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type, and store the appropriate bytes in *litP. The number of LITTLENUMS
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emitted is stored in *sizeP . An error message is returned, or NULL on OK.
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*/
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/* Equal to MAX_PRECISION in atof-ieee.c */
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#define MAX_LITTLENUMS 6
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char *
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md_atof (type, litP, sizeP)
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char type;
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char * litP;
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int * sizeP;
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{
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int i;
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int prec;
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LITTLENUM_TYPE words [MAX_LITTLENUMS];
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char * t;
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char * atof_ieee ();
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switch (type)
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{
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case 'f':
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case 'F':
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case 's':
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case 'S':
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prec = 2;
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break;
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case 'd':
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case 'D':
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case 'r':
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case 'R':
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prec = 4;
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break;
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/* FIXME: Some targets allow other format chars for bigger sizes here. */
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default:
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* sizeP = 0;
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return _("Bad call to md_atof()");
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}
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t = atof_ieee (input_line_pointer, type, words);
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if (t)
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input_line_pointer = t;
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* sizeP = prec * sizeof (LITTLENUM_TYPE);
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for (i = 0; i < prec; i++)
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{
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md_number_to_chars (litP, (valueT) words[i],
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sizeof (LITTLENUM_TYPE));
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litP += sizeof (LITTLENUM_TYPE);
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}
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return 0;
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}
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boolean
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openrisc_fix_adjustable (fixP)
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fixS * fixP;
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{
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if (fixP->fx_addsy == NULL)
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return 1;
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/* We need the symbol name for the VTABLE entries */
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if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
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|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
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return 0;
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return 1;
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}
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