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537 lines
14 KiB
C
537 lines
14 KiB
C
/* The common simulator framework for GDB, the GNU Debugger.
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Copyright 2002-2018 Free Software Foundation, Inc.
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Contributed by Andrew Cagney and Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef HW_DEVICE_H
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#define HW_DEVICE_H
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/* Introduction:
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As explained in earlier sections, the device, device instance,
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property and ports lie at the heart of PSIM's device model.
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In the below a synopsis of the device object and the operations it
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supports are given.
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*/
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/* Creation:
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The devices are created using a sequence of steps. In particular:
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o A tree framework is created.
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At this point, properties can be modified and extra
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devices inserted (or removed?).
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#if LATER
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Any properties that have a run-time value (eg ihandle
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or device instance pointer properties) are entered
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into the device tree using a named reference to the
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corresponding runtime object that is to be created.
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#endif
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o Real devices are created for all the dummy devices.
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A device can assume that all of its parents have been
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initialized.
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A device can assume that all non run-time properties
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have been initialized.
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As part of being created, the device normally attaches
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itself to its parent bus.
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#if LATER
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Device instance data is initialized.
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#endif
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#if LATER
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o Any run-time properties are created.
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#endif
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#if MUCH_MUCH_LATER
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o Some devices, as part of their initialization
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might want to refer to ihandle properties
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in the device tree.
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#endif
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NOTES:
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o It is important to separate the creation
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of an actual device from the creation
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of the tree. The alternative creating
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the device in two stages: As a separate
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entity and then as a part of the tree.
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#if LATER
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o Run-time properties can not be created
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until after the devices in the tree
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have been created. Hence an extra pass
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for handling them.
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#endif
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*/
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/* Relationships:
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A device is able to determine its relationship to other devices
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within the tree. Operations include querying for a devices parent,
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sibling, child, name, and path (from the root).
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*/
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#define hw_parent(hw) ((hw)->parent_of_hw + 0)
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#define hw_sibling(hw) ((hw)->sibling_of_hw + 0)
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#define hw_child(hw) ((hw)->child_of_hw + 0)
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/* Herritage:
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*/
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#define hw_family(hw) ((hw)->family_of_hw + 0)
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#define hw_name(hw) ((hw)->name_of_hw + 0)
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#define hw_args(hw) ((hw)->args_of_hw + 0)
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#define hw_path(hw) ((hw)->path_of_hw + 0)
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/* Short cut to the root node of the tree */
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#define hw_root(hw) ((hw)->root_of_hw + 0)
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/* Short cut back to the simulator object */
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#define hw_system(hw) ((hw)->system_of_hw)
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/* For requests initiated by a CPU the cpu that initiated the request */
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struct _sim_cpu *hw_system_cpu (struct hw *hw);
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/* Device private data */
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#define hw_data(hw) ((hw)->data_of_hw)
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#define set_hw_data(hw, value) \
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((hw)->data_of_hw = (value))
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/* Perform a soft reset of the device */
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typedef unsigned (hw_reset_method)
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(struct hw *me);
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#define hw_reset(hw) ((hw)->to_reset (hw))
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#define set_hw_reset(hw, method) \
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((hw)->to_reset = method)
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/* Hardware operations:
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Connecting a parent to its children is a common bus. The parent
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node is described as the bus owner and is responisble for
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co-ordinating bus operations. On the bus, a SPACE:ADDR pair is used
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to specify an address. A device that is both a bus owner (parent)
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and bus client (child) are referred to as a bridging device.
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A child performing a data (DMA) transfer will pass its request to
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the bus owner (the devices parent). The bus owner will then either
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reflect the request to one of the other devices attached to the bus
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(a child of the bus owner) or bridge the request up the tree to the
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next bus. */
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/* Children attached to a bus can register (attach) themselves to
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specific addresses on their attached bus.
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(A device may also be implicitly attached to certain bus
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addresses).
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The SPACE:ADDR pair specify an address on the common bus that
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connects the parent and child devices. */
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typedef void (hw_attach_address_method)
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(struct hw *me,
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int level,
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int space,
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address_word addr,
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address_word nr_bytes,
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struct hw *client); /*callback/default*/
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#define hw_attach_address(me, level, space, addr, nr_bytes, client) \
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((me)->to_attach_address (me, level, space, addr, nr_bytes, client))
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#define set_hw_attach_address(hw, method) \
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((hw)->to_attach_address = (method))
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typedef void (hw_detach_address_method)
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(struct hw *me,
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int level,
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int space,
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address_word addr,
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address_word nr_bytes,
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struct hw *client); /*callback/default*/
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#define hw_detach_address(me, level, space, addr, nr_bytes, client) \
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((me)->to_detach_address (me, level, space, addr, nr_bytes, client))
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#define set_hw_detach_address(hw, method) \
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((hw)->to_detach_address = (method))
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/* An IO operation from a parent to a child via the conecting bus.
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The SPACE:ADDR pair specify an address on the bus shared between
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the parent and child devices. */
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typedef unsigned (hw_io_read_buffer_method)
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(struct hw *me,
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void *dest,
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int space,
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unsigned_word addr,
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unsigned nr_bytes);
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#define hw_io_read_buffer(hw, dest, space, addr, nr_bytes) \
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((hw)->to_io_read_buffer (hw, dest, space, addr, nr_bytes))
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#define set_hw_io_read_buffer(hw, method) \
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((hw)->to_io_read_buffer = (method))
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typedef unsigned (hw_io_write_buffer_method)
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(struct hw *me,
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const void *source,
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int space,
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unsigned_word addr,
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unsigned nr_bytes);
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#define hw_io_write_buffer(hw, src, space, addr, nr_bytes) \
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((hw)->to_io_write_buffer (hw, src, space, addr, nr_bytes))
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#define set_hw_io_write_buffer(hw, method) \
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((hw)->to_io_write_buffer = (method))
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/* Conversly, the device pci1000,1@1 may need to perform a dma transfer
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into the cpu/memory core. Just as I/O moves towards the leaves,
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dma transfers move towards the core via the initiating devices
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parent nodes. The root device (special) converts the DMA transfer
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into reads/writes to memory.
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The SPACE:ADDR pair specify an address on the common bus connecting
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the parent and child devices. */
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typedef unsigned (hw_dma_read_buffer_method)
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(struct hw *bus,
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void *dest,
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int space,
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unsigned_word addr,
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unsigned nr_bytes);
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#define hw_dma_read_buffer(bus, dest, space, addr, nr_bytes) \
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((bus)->to_dma_read_buffer (bus, dest, space, addr, nr_bytes))
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#define set_hw_dma_read_buffer(me, method) \
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((me)->to_dma_read_buffer = (method))
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typedef unsigned (hw_dma_write_buffer_method)
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(struct hw *bus,
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const void *source,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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int violate_read_only_section);
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#define hw_dma_write_buffer(bus, src, space, addr, nr_bytes, violate_ro) \
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((bus)->to_dma_write_buffer (bus, src, space, addr, nr_bytes, violate_ro))
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#define set_hw_dma_write_buffer(me, method) \
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((me)->to_dma_write_buffer = (method))
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/* Address/size specs for devices are encoded following a convention
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similar to that used by OpenFirmware. In particular, an
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address/size is packed into a sequence of up to four cell words.
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The number of words determined by the number of {address,size}
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cells attributes of the device. */
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typedef struct _hw_unit
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{
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int nr_cells;
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unsigned_cell cells[4]; /* unused cells are zero */
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} hw_unit;
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/* For the given bus, the number of address and size cells used in a
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hw_unit. */
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#define hw_unit_nr_address_cells(bus) ((bus)->nr_address_cells_of_hw_unit + 0)
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#define hw_unit_nr_size_cells(bus) ((bus)->nr_size_cells_of_hw_unit + 0)
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/* For the given device, its identifying hw_unit address.
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Each device has an identifying hw_unit address. That address is
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used when identifying one of a number of identical devices on a
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common controller bus. ex fd0&fd1. */
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const hw_unit *hw_unit_address
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(struct hw *me);
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/* Convert between a textual and the internal representation of a
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hw_unit address/size.
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NOTE: A device asks its parent to translate between a hw_unit and
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textual representation. This is because the textual address of a
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device is specified using the parent busses notation. */
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typedef int (hw_unit_decode_method)
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(struct hw *bus,
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const char *encoded,
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hw_unit *unit);
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#define hw_unit_decode(bus, encoded, unit) \
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((bus)->to_unit_decode (bus, encoded, unit))
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#define set_hw_unit_decode(hw, method) \
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((hw)->to_unit_decode = (method))
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typedef int (hw_unit_encode_method)
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(struct hw *bus,
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const hw_unit *unit,
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char *encoded,
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int sizeof_buf);
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#define hw_unit_encode(bus, unit, encoded, sizeof_encoded) \
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((bus)->to_unit_encode (bus, unit, encoded, sizeof_encoded))
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#define set_hw_unit_encode(hw, method) \
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((hw)->to_unit_encode = (method))
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/* As the bus that the device is attached too, to translate a devices
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hw_unit address/size into a form suitable for an attach address
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call.
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Return a zero result if the address should be ignored when looking
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for attach addresses. */
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typedef int (hw_unit_address_to_attach_address_method)
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(struct hw *bus,
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const hw_unit *unit_addr,
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int *attach_space,
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unsigned_word *attach_addr,
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struct hw *client);
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#define hw_unit_address_to_attach_address(bus, unit_addr, attach_space, attach_addr, client) \
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((bus)->to_unit_address_to_attach_address (bus, unit_addr, attach_space, attach_addr, client))
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#define set_hw_unit_address_to_attach_address(hw, method) \
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((hw)->to_unit_address_to_attach_address = (method))
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typedef int (hw_unit_size_to_attach_size_method)
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(struct hw *bus,
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const hw_unit *unit_size,
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unsigned *attach_size,
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struct hw *client);
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#define hw_unit_size_to_attach_size(bus, unit_size, attach_size, client) \
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((bus)->to_unit_size_to_attach_size (bus, unit_size, attach_size, client))
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#define set_hw_unit_size_to_attach_size(hw, method) \
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((hw)->to_unit_size_to_attach_size = (method))
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extern char *hw_strdup (struct hw *me, const char *str);
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/* Utilities:
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*/
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/* IOCTL::
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Often devices require `out of band' operations to be performed.
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For instance a pal device may need to notify a PCI bridge device
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that an interrupt ack cycle needs to be performed on the PCI bus.
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Within PSIM such operations are performed by using the generic
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ioctl call <<hw_ioctl()>>.
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*/
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typedef enum
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{
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hw_ioctl_break, /* unsigned_word requested_break */
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hw_ioctl_set_trace, /* void */
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hw_ioctl_create_stack, /* unsigned_word *sp, char **argv, char **envp */
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hw_ioctl_change_media, /* const char *new_image (possibly NULL) */
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nr_hw_ioctl_requests,
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} hw_ioctl_request;
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typedef int (hw_ioctl_method)
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(struct hw *me,
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hw_ioctl_request request,
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va_list ap);
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int hw_ioctl
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(struct hw *me,
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hw_ioctl_request request,
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...);
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/* Error reporting::
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So that errors originating from devices appear in a consistent
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format, the <<hw_abort()>> function can be used. Formats and
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outputs the error message before aborting the simulation
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Devices should use this function to abort the simulation except
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when the abort reason leaves the simulation in a hazardous
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condition (for instance a failed malloc).
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*/
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void hw_abort
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(struct hw *me,
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const char *fmt,
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...) __attribute__ ((format (printf, 2, 3), noreturn));
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void hw_vabort
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(struct hw *me,
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const char *fmt,
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va_list ap) __attribute__ ((noreturn));
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void hw_halt
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(struct hw *me,
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int reason,
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int status) __attribute__ ((noreturn));
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#define hw_trace_p(hw) ((hw)->trace_of_hw_p + 0)
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void hw_trace
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(struct hw *me,
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const char *fmt,
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...) __attribute__ ((format (printf, 2, 3)));
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#define HW_TRACE(ARGS) \
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do { \
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if (hw_trace_p (me)) \
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{ \
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hw_trace ARGS; \
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} \
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} while (0)
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/* Some of the related functions require specific types */
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struct hw_property_data;
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struct hw_port_data;
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struct hw_base_data;
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struct hw_alloc_data;
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struct hw_event_data;
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struct hw_handle_data;
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struct hw_instance_data;
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/* Finally the hardware device - keep your grubby little mits off of
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these internals! :-) */
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struct hw
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{
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/* our relatives */
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struct hw *parent_of_hw;
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struct hw *sibling_of_hw;
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struct hw *child_of_hw;
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/* our identity */
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const char *name_of_hw;
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const char *family_of_hw;
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const char *args_of_hw;
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const char *path_of_hw;
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/* our data */
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void *data_of_hw;
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/* hot links */
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struct hw *root_of_hw;
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struct sim_state *system_of_hw;
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/* identifying data */
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hw_unit unit_address_of_hw;
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int nr_address_cells_of_hw_unit;
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int nr_size_cells_of_hw_unit;
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/* Soft reset */
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hw_reset_method *to_reset;
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/* Basic callbacks */
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hw_io_read_buffer_method *to_io_read_buffer;
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hw_io_write_buffer_method *to_io_write_buffer;
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hw_dma_read_buffer_method *to_dma_read_buffer;
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hw_dma_write_buffer_method *to_dma_write_buffer;
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hw_attach_address_method *to_attach_address;
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hw_detach_address_method *to_detach_address;
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/* More complicated callbacks */
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hw_ioctl_method *to_ioctl;
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int trace_of_hw_p;
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/* address callbacks */
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hw_unit_decode_method *to_unit_decode;
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hw_unit_encode_method *to_unit_encode;
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hw_unit_address_to_attach_address_method *to_unit_address_to_attach_address;
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hw_unit_size_to_attach_size_method *to_unit_size_to_attach_size;
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/* related data */
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struct hw_property_data *properties_of_hw;
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struct hw_port_data *ports_of_hw;
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struct hw_base_data *base_of_hw;
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struct hw_alloc_data *alloc_of_hw;
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struct hw_event_data *events_of_hw;
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struct hw_handle_data *handles_of_hw;
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struct hw_instance_data *instances_of_hw;
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};
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#endif
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