Mike Frysinger 7a9bd3b4e2 sim: erc32/m32c/rl78: add sim_memory_map stub for gdb ... These ports don't use the common sim core, so they weren't providing a sim_memory_map for gdb, so they failed to link with the new memory map logic added for the sim. Add stubs to fix.		2021-02-06 12:15:34 -05:00
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aclocal.m4
ChangeLog	sim: erc32/m32c/rl78: add sim_memory_map stub for gdb	2021-02-06 12:15:34 -05:00
config.in	sim: clean up C11 header includes	2021-01-11 08:05:54 -05:00
configure	sim: common: switch AC_CONFIG_HEADERS	2021-02-06 12:00:42 -05:00
configure.ac	sim: enable -Werror by default for some arches	2021-01-09 09:19:37 -05:00
cpu.h
gdb-if.c	sim: erc32/m32c/rl78: add sim_memory_map stub for gdb	2021-02-06 12:15:34 -05:00
int.c
int.h
load.c
load.h
m32c.opc
main.c
Makefile.in
mem.c
mem.h
misc.c
misc.h
opc2c.c
r8c.opc
reg.c
safe-fgets.c
safe-fgets.h
srcdest.c
syscall.h
syscalls.c
syscalls.h
timer_a.h
trace.c
trace.h