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Tom Tromey ce887586b4 Fix decoding of ARM VFP instructions
-Wduplicated-cond pointed out that arm_record_vfp_data_proc_insn
checks "opc1 == 0x0b" twice.  I filed this a while ago as
PR tdep/20362.

Based on the ARM instruction manual at
https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf, I think the
instruction decoding in this function has two bugs.

First, opc1 is computed as:

  opc1 = bits (arm_insn_r->arm_insn, 20, 23);
[...]
  opc1 = opc1 & 0x04;

This means that tests like:

  else if (opc1 == 0x01)

can never be true.

In the ARM manual, "opc1" corresponds to these bits:

    name   bit
    r      20
    q      21
    D      22
    p      23

... where the D bit is not used for VFP instruction decoding.

So, I believe this code should use ~0x04 instead.

Second, VDIV is recognized by the bits "pqrs" being equal to "1000".
This tranlates to opc1 == 0x08 -- not 0x0b.  Note that pqrs==1001 is
an undefined encoding, which is probably why opc2 is not checked here;
this code doesn't seem to really deal with undefined encodings in
general, so I've left that as is.

I don't have an ARM machine or any reasonable way to test this.

ChangeLog
2018-05-07  Tom Tromey  <tom@tromey.com>

	PR tdep/20362:
	* arm-tdep.c (arm_record_vfp_data_proc_insn): Properly mask off D
	bit.  Use correct value for VDIV.
2018-05-07 08:47:37 -06:00
bfd Replace uses of strncmp with memcmp 2018-05-07 12:33:26 +09:30
binutils Bug 23142, SIGSEGV in is_strip_section 2018-05-07 22:50:31 +09:30
config
cpu
elfcpp
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gas Cleanup ppc code dealing with opcode dumps. 2018-05-07 09:40:59 -05:00
gdb Fix decoding of ARM VFP instructions 2018-05-07 08:47:37 -06:00
gold
gprof
include Cleanup ppc code dealing with opcode dumps. 2018-05-07 09:40:59 -05:00
intl
ld Fix typo in Makefile.am to make it agree with Makefile.in. 2018-05-03 17:25:31 -07:00
libdecnumber
libiberty
opcodes Cleanup ppc code dealing with opcode dumps. 2018-05-07 09:40:59 -05:00
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