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FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts. Part 1 adds a 15-bit instruction field, and CPU-specific functions for the code compression that are used in binutils and GDB. bfd/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-ft32.c: Add HOWTO R_FT32_15. * reloc.c: Add BFD_RELOC_FT32_15. gas/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with K15. (md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15. include/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * elf/ft32.h: Add R_FT32_15. * opcode/ft32.h: Replace FT32_FLD_K8 with K15. (ft32_shortcode, sc_compar, ft32_split_shortcode, ft32_merge_shortcode, ft32_merge_shortcode): New functions. opcodes/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15. * opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with K15. Add jmpix pattern. sim/ChangeLog: 2017-10-12 James Bowman <james.bowman@ftdichip.com> * sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15. |
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aarch64 | ||
arm | ||
avr | ||
bfin | ||
common | ||
cr16 | ||
cris | ||
d10v | ||
erc32 | ||
frv | ||
ft32 | ||
h8300 | ||
igen | ||
iq2000 | ||
lm32 | ||
m32c | ||
m32r | ||
m68hc11 | ||
mcore | ||
microblaze | ||
mips | ||
mn10300 | ||
moxie | ||
msp430 | ||
ppc | ||
rl78 | ||
rx | ||
sh | ||
sh64 | ||
testsuite | ||
v850 | ||
.gitignore | ||
ChangeLog | ||
configure | ||
configure.ac | ||
configure.tgt | ||
MAINTAINERS | ||
Makefile.in | ||
README-HACKING |