Przemyslaw Wirkus e64441b14c aarch64: Extract Condition flag manipulation feature from Armv8.4-A ... Extract FLAGM (Condition flag manipulation) feature from Armv8.4-A. Please note that FLAGM stays a Armv8.4-A feature but now can be assigned to other architectures or CPUs. New -march option +flagm is added to enable independently this feature.		2020-11-16 21:07:17 +00:00
..
po	opcodes/po/es.po: Remove the duplicated entry	2020-10-22 05:21:35 -07:00
.gitignore
aarch64-asm-2.c	aarch64: Limit Rt register number for LS64 load/store instructions	2020-11-09 11:19:44 +00:00
aarch64-asm.c	aarch64: Add DSB instruction Armv8.7-a variant	2020-10-28 14:05:05 +00:00
aarch64-asm.h	aarch64: Add DSB instruction Armv8.7-a variant	2020-10-28 14:05:05 +00:00
aarch64-dis-2.c	aarch64: Limit Rt register number for LS64 load/store instructions	2020-11-09 11:19:44 +00:00
aarch64-dis.c	aarch64: Add DSB instruction Armv8.7-a variant	2020-10-28 14:05:05 +00:00
aarch64-dis.h	aarch64: Add DSB instruction Armv8.7-a variant	2020-10-28 14:05:05 +00:00
aarch64-gen.c
aarch64-opc-2.c	aarch64: Limit Rt register number for LS64 load/store instructions	2020-11-09 11:19:44 +00:00
aarch64-opc.c	aarch64: Update LS64 feature with system register	2020-11-09 11:37:32 +00:00
aarch64-opc.h	aarch64: Add DSB instruction Armv8.7-a variant	2020-10-28 14:05:05 +00:00
aarch64-tbl.h	aarch64: Extract Condition flag manipulation feature from Armv8.4-A	2020-11-16 21:07:17 +00:00
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c
arc-dis.h
arc-ext-tbl.h
arc-ext.c
arc-ext.h
arc-fxi.h
arc-nps400-tbl.h
arc-opc.c
arc-regs.h
arc-tbl.h
arm-dis.c
avr-dis.c
bfin-dis.c
bpf-asm.c
bpf-desc.c
bpf-desc.h
bpf-dis.c
bpf-ibld.c
bpf-opc.c
bpf-opc.h
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c
cgen-dis.in
cgen-ibld.in
cgen-opc.c
cgen.sh
ChangeLog	aarch64: Extract Condition flag manipulation feature from Armv8.4-A	2020-11-16 21:07:17 +00:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-2015
ChangeLog-2016
ChangeLog-2017
ChangeLog-2018
ChangeLog-2019
ChangeLog-9297
ChangeLog-9899
config.in
configure
configure.ac
configure.com
cr16-dis.c
cr16-opc.c
cris-dis.c
cris-opc.c
crx-dis.c
crx-opc.c
csky-dis.c	CSKY: Fix and add some instructions for VDSPV1.	2020-10-26 16:13:55 +08:00
csky-opc.h	CSKY: Change plsl.u16 to plsl.16.	2020-10-26 16:26:32 +08:00
d10v-dis.c
d10v-opc.c
d30v-dis.c
d30v-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c
disassemble.h
dlx-dis.c
epiphany-asm.c
epiphany-desc.c
epiphany-desc.h
epiphany-dis.c
epiphany-ibld.c
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c
fr30-desc.h
fr30-dis.c
fr30-ibld.c
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c
frv-desc.h
frv-dis.c
frv-ibld.c
frv-opc.c
frv-opc.h
ft32-dis.c
ft32-opc.c
h8300-dis.c
hppa-dis.c
i386-dis-evex-len.h
i386-dis-evex-mod.h
i386-dis-evex-prefix.h
i386-dis-evex-reg.h
i386-dis-evex-w.h
i386-dis-evex.h
i386-dis.c	x86: Ignore CS/DS/ES/SS segment-override prefixes in 64-bit mode	2020-11-14 06:20:33 -08:00
i386-gen.c	Add AMD znver3 processor support	2020-10-20 13:58:04 -07:00
i386-init.h	Add AMD znver3 processor support	2020-10-20 13:58:04 -07:00
i386-opc.c
i386-opc.h	Add AMD znver3 processor support	2020-10-20 13:58:04 -07:00
i386-opc.tbl	Add AMD znver3 processor support	2020-10-20 13:58:04 -07:00
i386-reg.tbl
i386-tbl.h	Add AMD znver3 processor support	2020-10-20 13:58:04 -07:00
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c
ip2k-desc.h
ip2k-dis.c
ip2k-ibld.c
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c
iq2000-desc.h
iq2000-dis.c
iq2000-ibld.c
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c
lm32-desc.h
lm32-dis.c
lm32-ibld.c
lm32-opc.c
lm32-opc.h
lm32-opinst.c
m32c-asm.c
m32c-desc.c
m32c-desc.h
m32c-dis.c
m32c-ibld.c
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c
m32r-desc.h
m32r-dis.c
m32r-ibld.c
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c
m68k-opc.c
m10200-dis.c
m10200-opc.c
m10300-dis.c
m10300-opc.c
MAINTAINERS
Makefile.am
Makefile.in
makefile.vms
mcore-dis.c
mcore-opc.h
mep-asm.c
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
metag-dis.c
microblaze-dis.c
microblaze-dis.h
microblaze-opc.h
microblaze-opcm.h
micromips-opc.c
mips16-opc.c
mips-dis.c
mips-formats.h
mips-opc.c
mmix-dis.c
mmix-opc.c
moxie-dis.c
moxie-opc.c
msp430-decode.c
msp430-decode.opc
msp430-dis.c
mt-asm.c
mt-desc.c
mt-desc.h
mt-dis.c
mt-ibld.c
mt-opc.c
mt-opc.h
nds32-asm.c
nds32-asm.h
nds32-dis.c
nds32-opc.h
nfp-dis.c
nios2-dis.c
nios2-opc.c
ns32k-dis.c
opc2c.c
opintl.h
or1k-asm.c
or1k-desc.c
or1k-desc.h
or1k-dis.c
or1k-ibld.c
or1k-opc.c
or1k-opc.h
or1k-opinst.c
pdp11-dis.c
pdp11-opc.c
pj-dis.c
pj-opc.c
ppc-dis.c
ppc-opc.c
pru-dis.c
pru-opc.c	Add support for the LMBD (left-most bit detect) instruction to the PRU assembler.	2020-11-09 12:41:09 +00:00
riscv-dis.c
riscv-opc.c
rl78-decode.c
rl78-decode.opc
rl78-dis.c
rx-decode.c
rx-decode.opc
rx-dis.c
s12z-dis.c
s12z-opc.c
s12z-opc.h
s390-dis.c
s390-mkopc.c
s390-opc.c
s390-opc.txt
score7-dis.c
score-dis.c
score-opc.h
sh-dis.c
sh-opc.h
sparc-dis.c
sparc-opc.c
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h
tic4x-dis.c
tic6x-dis.c
tic30-dis.c
tic54x-dis.c
tic54x-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c
v850-opc.c
vax-dis.c
visium-dis.c
visium-opc.c
wasm32-dis.c
xc16x-asm.c
xc16x-desc.c
xc16x-desc.h
xc16x-dis.c
xc16x-ibld.c
xc16x-opc.c
xc16x-opc.h
xgate-dis.c
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c
xstormy16-desc.h
xstormy16-dis.c
xstormy16-ibld.c
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c
z8k-dis.c
z8k-opc.h
z8kgen.c
z80-dis.c