mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
325801bda4
gas/ChangeLog: 2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * app.c (app_push): use XNEW macro. * as.c: Likewise. * config/obj-elf.c (obj_elf_change_section): Likewise. (elf_copy_symbol_attributes): Likewise. (obj_elf_size): Likewise. (build_group_lists): Likewise. * config/tc-aarch64.c (add_operand_error_record): Likewise. (md_assemble): Likewise. (tc_gen_reloc): Likewise. (get_upper_str): Likewise. (aarch64_parse_features): Likewise. * config/tc-arm.c (insert_reg_alias): Likewise. (insert_neon_reg_alias): Likewise. (find_or_make_literal_pool): Likewise. (s_arm_elf_cons): Likewise. (add_unwind_opcode): Likewise. (arm_parse_extension): Likewise. * config/tc-avr.c (create_record_for_frag): Likewise. * config/tc-crx.c: Likewise. * config/tc-d30v.c: Likewise. * config/tc-dlx.c (s_proc): Likewise. * config/tc-ft32.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c (pa_proc): Likewise. (create_new_space): Likewise. (create_new_subspace): Likewise. * config/tc-i860.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-iq2000.c (iq2000_add_macro): Likewise. (iq2000_record_hi16): Likewise. * config/tc-m32c.c (m32c_indirect_operand): Likewise. * config/tc-m32r.c (debug_sym): Likewise. (m32r_record_hi16): Likewise. * config/tc-m68k.c (m68k_ip): Likewise. (md_begin): Likewise. * config/tc-mcore.c: Likewise. * config/tc-microblaze.c (check_got): Likewise. * config/tc-mips.c (append_insn): Likewise. (s_mipsset): Likewise. (mips_record_label): Likewise. (s_mips_end): Likewise. * config/tc-mmix.c (mmix_frob_file): Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-moxie.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise. * config/tc-ns32k.c: Likewise. * config/tc-or1k.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-pj.c (fake_opcode): Likewise. * config/tc-ppc.c (ppc_apuinfo_section_add): Likewise. (ppc_macro): Likewise. (ppc_dwsect): Likewise. (ppc_machine): Likewise. * config/tc-rl78.c (rl78_frag_init): Likewise. * config/tc-rx.c (rx_frag_init): Likewise. * config/tc-s390.c (s390_lit_suffix): Likewise. (s390_machine): Likewise. (s390_machinemode): Likewise. * config/tc-score.c (s3_insert_reg): Likewise. (s3_gen_reloc): Likewise. * config/tc-score7.c (s7_insert_reg): Likewise. (s7_gen_reloc): Likewise. * config/tc-tic30.c (tic30_operand): Likewise. * config/tc-tic4x.c (tic4x_inst_make): Likewise. * config/tc-tic54x.c (stag_add_field): Likewise. (tic54x_struct): Likewise. (tic54x_space): Likewise. (tic54x_field): Likewise. (tic54x_mlib): Likewise. (subsym_substitute): Likewise. * config/tc-tic6x.c (tic6x_frob_label): Likewise. * config/tc-vax.c: Likewise. * config/tc-xc16x.c: Likewise. * config/tc-xtensa.c (xtensa_add_insn_label): Likewise. (directive_push): Likewise. (xtensa_begin_directive): Likewise. (tokenize_arguments): Likewise. (xtensa_add_literal_sym): Likewise. (new_resource_table): Likewise. (resize_resource_table): Likewise. (emit_single_op): Likewise. (xtensa_create_trampoline_frag): Likewise. (xtensa_maybe_create_literal_pool_frag): Likewise. (xtensa_add_config_info): Likewise. (xtensa_realloc_fixup_cache): Likewise. (add_subseg_info): Likewise. (cache_literal_section): Likewise. (add_xt_block_frags): Likewise. (add_xt_prop_frags): Likewise. (init_op_placement_info_table): Likewise. (build_section_rename): Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * depend.c (register_dependency): Likewise. * dwarf2dbg.c (get_line_subseg): Likewise. (dwarf2_gen_line_info_1): Likewise. (get_filenum): Likewise. * ecoff.c (allocate_scope): Likewise. (allocate_vlinks): Likewise. (allocate_shash): Likewise. (allocate_thash): Likewise. (allocate_tag): Likewise. (allocate_forward): Likewise. (allocate_thead): Likewise. (allocate_lineno_list): Likewise. * expr.c (make_expr_symbol): Likewise. * hash.c (hash_new_sized): Likewise. * input-file.c (input_file_push): Likewise. * listing.c (file_info): Likewise. (listing_newline): Likewise. * macro.c (new_formal): Likewise. (define_macro): Likewise. * remap.c (add_debug_prefix_map): Likewise. * symbols.c (symbol_find_noref): Likewise. (define_dollar_label): Likewise. (fb_label_instance_inc): Likewise. (symbol_relc_make_value): Likewise.
350 lines
8.1 KiB
C
350 lines
8.1 KiB
C
/* tc-xc16x.c -- Assembler for the Infineon XC16X.
|
|
Copyright (C) 2006-2016 Free Software Foundation, Inc.
|
|
Contributed by KPIT Cummins Infosystems
|
|
|
|
This file is part of GAS, the GNU Assembler.
|
|
|
|
GAS is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3, or (at your option)
|
|
any later version.
|
|
|
|
GAS is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with GAS; see the file COPYING. If not, write to the Free
|
|
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
|
02110-1301, USA. */
|
|
|
|
|
|
#include "as.h"
|
|
#include "safe-ctype.h"
|
|
#include "subsegs.h"
|
|
#include "symcat.h"
|
|
#include "opcodes/xc16x-desc.h"
|
|
#include "opcodes/xc16x-opc.h"
|
|
#include "cgen.h"
|
|
#include "dwarf2dbg.h"
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
#include "elf/xc16x.h"
|
|
#endif
|
|
|
|
/* Structure to hold all of the different components describing
|
|
an individual instruction. */
|
|
typedef struct
|
|
{
|
|
const CGEN_INSN * insn;
|
|
const CGEN_INSN * orig_insn;
|
|
CGEN_FIELDS fields;
|
|
#if CGEN_INT_INSN_P
|
|
CGEN_INSN_INT buffer [1];
|
|
#define INSN_VALUE(buf) (*(buf))
|
|
#else
|
|
unsigned char buffer [CGEN_MAX_INSN_SIZE];
|
|
#define INSN_VALUE(buf) (buf)
|
|
#endif
|
|
char * addr;
|
|
fragS * frag;
|
|
int num_fixups;
|
|
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
|
|
int indices [MAX_OPERAND_INSTANCES];
|
|
}
|
|
xc16x_insn;
|
|
|
|
const char comment_chars[] = ";";
|
|
const char line_comment_chars[] = "#";
|
|
const char line_separator_chars[] = "";
|
|
const char EXP_CHARS[] = "eE";
|
|
const char FLT_CHARS[] = "dD";
|
|
|
|
#define XC16X_SHORTOPTS ""
|
|
const char * md_shortopts = XC16X_SHORTOPTS;
|
|
|
|
struct option md_longopts[] =
|
|
{
|
|
{NULL, no_argument, NULL, 0}
|
|
};
|
|
size_t md_longopts_size = sizeof (md_longopts);
|
|
|
|
static void
|
|
xc16xlmode (int arg ATTRIBUTE_UNUSED)
|
|
{
|
|
if (stdoutput != NULL)
|
|
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xl))
|
|
as_warn (_("could not set architecture and machine"));
|
|
}
|
|
|
|
static void
|
|
xc16xsmode (int arg ATTRIBUTE_UNUSED)
|
|
{
|
|
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xs))
|
|
as_warn (_("could not set architecture and machine"));
|
|
}
|
|
|
|
static void
|
|
xc16xmode (int arg ATTRIBUTE_UNUSED)
|
|
{
|
|
if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16x))
|
|
as_warn (_("could not set architecture and machine"));
|
|
}
|
|
|
|
/* The target specific pseudo-ops which we support. */
|
|
const pseudo_typeS md_pseudo_table[] =
|
|
{
|
|
{ "word", cons, 2 },
|
|
{"xc16xl", xc16xlmode, 0},
|
|
{"xc16xs", xc16xsmode, 0},
|
|
{"xc16x", xc16xmode, 0},
|
|
{ NULL, NULL, 0 }
|
|
};
|
|
|
|
void
|
|
md_begin (void)
|
|
{
|
|
/* Initialize the `cgen' interface. */
|
|
|
|
/* Set the machine number and endian. */
|
|
gas_cgen_cpu_desc = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
|
|
CGEN_CPU_OPEN_ENDIAN,
|
|
CGEN_ENDIAN_LITTLE,
|
|
CGEN_CPU_OPEN_END);
|
|
xc16x_cgen_init_asm (gas_cgen_cpu_desc);
|
|
|
|
/* This is a callback from cgen to gas to parse operands. */
|
|
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
|
|
}
|
|
|
|
void
|
|
md_assemble (char *str)
|
|
{
|
|
xc16x_insn insn;
|
|
char *errmsg;
|
|
|
|
/* Initialize GAS's cgen interface for a new instruction. */
|
|
gas_cgen_init_parse ();
|
|
|
|
insn.insn = xc16x_cgen_assemble_insn
|
|
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
|
|
|
|
if (!insn.insn)
|
|
{
|
|
as_bad ("%s", errmsg);
|
|
return;
|
|
}
|
|
|
|
/* Doesn't really matter what we pass for RELAX_P here. */
|
|
gas_cgen_finish_insn (insn.insn, insn.buffer,
|
|
CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
|
|
}
|
|
|
|
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
|
|
Returns BFD_RELOC_NONE if no reloc type can be found.
|
|
*FIXP may be modified if desired. */
|
|
|
|
bfd_reloc_code_real_type
|
|
md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
|
|
const CGEN_OPERAND *operand,
|
|
fixS *fixP)
|
|
{
|
|
switch (operand->type)
|
|
{
|
|
case XC16X_OPERAND_REL:
|
|
/* ??? Adjust size? */
|
|
fixP->fx_where += 1;
|
|
fixP->fx_pcrel = 1;
|
|
return BFD_RELOC_8_PCREL;
|
|
|
|
case XC16X_OPERAND_CADDR:
|
|
fixP->fx_size = 2;
|
|
fixP->fx_where += 2;
|
|
return BFD_RELOC_16;
|
|
|
|
case XC16X_OPERAND_UIMM7:
|
|
/* ??? Adjust size? */
|
|
fixP->fx_where += 1;
|
|
fixP->fx_pcrel = 1;
|
|
return BFD_RELOC_8_PCREL;
|
|
|
|
case XC16X_OPERAND_UIMM16:
|
|
case XC16X_OPERAND_MEMORY:
|
|
fixP->fx_size = 2;
|
|
fixP->fx_where += 2;
|
|
return BFD_RELOC_16;
|
|
|
|
case XC16X_OPERAND_UPOF16:
|
|
fixP->fx_size = 2;
|
|
fixP->fx_where += 2;
|
|
return BFD_RELOC_XC16X_POF;
|
|
|
|
case XC16X_OPERAND_UPAG16:
|
|
fixP->fx_size = 2;
|
|
fixP->fx_where += 2;
|
|
return BFD_RELOC_XC16X_PAG;
|
|
|
|
case XC16X_OPERAND_USEG8:
|
|
/* ??? This is an 8 bit field, why the 16 bit reloc? */
|
|
fixP->fx_where += 1;
|
|
return BFD_RELOC_XC16X_SEG;
|
|
|
|
case XC16X_OPERAND_USEG16:
|
|
case XC16X_OPERAND_USOF16:
|
|
fixP->fx_size = 2;
|
|
fixP->fx_where += 2;
|
|
return BFD_RELOC_XC16X_SOF;
|
|
|
|
default : /* Avoid -Wall warning. */
|
|
break;
|
|
}
|
|
|
|
return BFD_RELOC_NONE;
|
|
}
|
|
|
|
/* Write a value out to the object file, using the appropriate endianness. */
|
|
|
|
void
|
|
md_number_to_chars (char * buf, valueT val, int n)
|
|
{
|
|
number_to_chars_littleendian (buf, val, n);
|
|
}
|
|
|
|
void
|
|
md_show_usage (FILE * stream)
|
|
{
|
|
fprintf (stream, _(" XC16X specific command line options:\n"));
|
|
}
|
|
|
|
int
|
|
md_parse_option (int c ATTRIBUTE_UNUSED,
|
|
const char *arg ATTRIBUTE_UNUSED)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
const char *
|
|
md_atof (int type, char *litP, int *sizeP)
|
|
{
|
|
return ieee_md_atof (type, litP, sizeP, FALSE);
|
|
}
|
|
|
|
valueT
|
|
md_section_align (segT segment, valueT size)
|
|
{
|
|
int align = bfd_get_section_alignment (stdoutput, segment);
|
|
return ((size + (1 << align) - 1) & -(1 << align));
|
|
}
|
|
|
|
symbolS *
|
|
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
int
|
|
md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
|
|
segT segment_type ATTRIBUTE_UNUSED)
|
|
{
|
|
printf (_("call to md_estimate_size_before_relax \n"));
|
|
abort ();
|
|
}
|
|
|
|
|
|
long
|
|
md_pcrel_from (fixS *fixP)
|
|
{
|
|
long temp_val;
|
|
temp_val=fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
|
|
|
|
return temp_val;
|
|
}
|
|
|
|
long
|
|
md_pcrel_from_section (fixS *fixP, segT sec)
|
|
{
|
|
if (fixP->fx_addsy != (symbolS *) NULL
|
|
&& (! S_IS_DEFINED (fixP->fx_addsy)
|
|
|| S_GET_SEGMENT (fixP->fx_addsy) != sec
|
|
|| S_IS_EXTERNAL (fixP->fx_addsy)
|
|
|| S_IS_WEAK (fixP->fx_addsy)))
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
return md_pcrel_from (fixP);
|
|
}
|
|
|
|
arelent *
|
|
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
|
|
{
|
|
arelent *rel;
|
|
bfd_reloc_code_real_type r_type;
|
|
|
|
if (fixp->fx_addsy && fixp->fx_subsy)
|
|
{
|
|
if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
|
|
|| S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
|
|
{
|
|
as_bad_where (fixp->fx_file, fixp->fx_line,
|
|
_("Difference of symbols in different sections is not supported"));
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
rel = XNEW (arelent);
|
|
rel->sym_ptr_ptr = XNEW (asymbol *);
|
|
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
|
rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
|
rel->addend = fixp->fx_offset;
|
|
|
|
r_type = fixp->fx_r_type;
|
|
|
|
#define DEBUG 0
|
|
#if DEBUG
|
|
fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
|
|
fflush (stderr);
|
|
#endif
|
|
|
|
rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
|
|
if (rel->howto == NULL)
|
|
{
|
|
as_bad_where (fixp->fx_file, fixp->fx_line,
|
|
_("Cannot represent relocation type %s"),
|
|
bfd_get_reloc_code_name (r_type));
|
|
return NULL;
|
|
}
|
|
|
|
return rel;
|
|
}
|
|
|
|
void
|
|
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
|
|
{
|
|
if (!strstr (seg->name,".debug"))
|
|
{
|
|
if (*valP < 128)
|
|
*valP /= 2;
|
|
if (*valP>268435455)
|
|
{
|
|
*valP = *valP * (-1);
|
|
*valP /= 2;
|
|
*valP = 256 - (*valP);
|
|
}
|
|
}
|
|
|
|
gas_cgen_md_apply_fix (fixP, valP, seg);
|
|
return;
|
|
}
|
|
|
|
void
|
|
md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
|
|
segT seg ATTRIBUTE_UNUSED,
|
|
fragS *fragP ATTRIBUTE_UNUSED)
|
|
{
|
|
printf (_("call to md_convert_frag \n"));
|
|
abort ();
|
|
}
|