mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-12-09 04:21:49 +08:00
Code Issues Packages Projects Releases Wiki Activity
c44df9148d
binutils-gdb/ld/testsuite/ld-riscv-elf
History
Nelson Chu 8155b8539b RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 
This is the original discussion,
https://github.com/riscv/riscv-elf-psabi-doc/pull/190

And here is the glibc part,
https://sourceware.org/pipermail/libc-alpha/2021-August/129931.html

For binutils part, we need to support a new direcitve: .variant_cc.
The function symbol marked by .variant_cc means it need to be resolved
directly without resolver for dynamic linker.  We also add a new dynamic
entry, STO_RISCV_VARIANT_CC, to indicate there are symbols with the
special attribute in the dynamic symbol table of the object.

I heard that llvm already have supported this in their mainline, so
I think it's time to commit this.

bfd/
	* elfnn-riscv.c (riscv_elf_link_hash_table): Added variant_cc
	flag. It is used to check if relocations for variant CC symbols
	may be present.
	(allocate_dynrelocs): If the symbol has STO_RISCV_VARIANT_CC
	flag, then raise the variant_cc flag of riscv_elf_link_hash_table.
	(riscv_elf_size_dynamic_sections): Added dynamic entry for
	variant_cc.
	(riscv_elf_merge_symbol_attribute): New function, used to merge
	non-visibility st_other attributes, including STO_RISCV_VARIANT_CC.
binutils/
	* readelf.c (get_riscv_dynamic_type): New function.
	(get_dynamic_type): Called get_riscv_dynamic_type for riscv targets.
	(get_riscv_symbol_other): New function.
	(get_symbol_other): Called get_riscv_symbol_other for riscv targets.
gas/
	* config/tc-riscv.c (s_variant_cc): Marked symbol that it follows a
	variant CC convention.
	(riscv_elf_copy_symbol_attributes): Same as elf_copy_symbol_attributes,
	but without copying st_other.  If a function symbol has special st_other
	value set via directives, then attaching an IFUNC resolver to that symbol
	should not override the st_other setting.
	(riscv_pseudo_table): Support variant_cc diretive.
	* config/tc-riscv.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Defined.
	* testsuite/gas/riscv/variant_cc-set.d: New testcase.
	* testsuite/gas/riscv/variant_cc-set.s: Likewise.
	* testsuite/gas/riscv/variant_cc.d: Likewise.
	* testsuite/gas/riscv/variant_cc.s: Likewise.
include/
	* elf/riscv.h (DT_RISCV_VARIANT_CC): Defined to (DT_LOPROC + 1).
	(STO_RISCV_VARIANT_CC): Defined to 0x80.
ld/
	* testsuite/ld-riscv-elf/variant_cc-1.s: New testcase.
	* testsuite/ld-riscv-elf/variant_cc-2.s: Likewise.
	* testsuite/ld-riscv-elf/variant_cc-now.d: Likewise.
	* testsuite/ld-riscv-elf/variant_cc-r.d: Likewise.
	* testsuite/ld-riscv-elf/variant_cc-shared.d: Likewise.
	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2021-11-19 09:32:19 +08:00
..
align-small-region.d RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
align-small-region.ld RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
align-small-region.s RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
attr-merge-arch-01.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
attr-merge-arch-01a.s
attr-merge-arch-01b.s
attr-merge-arch-02.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
attr-merge-arch-02a.s
attr-merge-arch-02b.s
attr-merge-arch-03.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
attr-merge-arch-03a.s
attr-merge-arch-03b.s
attr-merge-arch-failed-01.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
attr-merge-arch-failed-01a.s RISC-V: Improve the error message for the mis-matched ISA versions. 2020-09-03 11:11:38 +08:00
attr-merge-arch-failed-01b.s RISC-V: Improve the error message for the mis-matched ISA versions. 2020-09-03 11:11:38 +08:00
attr-merge-arch-failed-02.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
attr-merge-arch-failed-02a.s RISC-V: Report warnings rather than errors for the mis-matched ISA versions. 2020-09-03 11:11:51 +08:00
attr-merge-arch-failed-02b.s RISC-V: Report warnings rather than errors for the mis-matched ISA versions. 2020-09-03 11:11:51 +08:00
attr-merge-arch-failed-02c.s RISC-V: Report warnings rather than errors for the mis-matched ISA versions. 2020-09-03 11:11:51 +08:00
attr-merge-arch-failed-02d.s RISC-V: Report warnings rather than errors for the mis-matched ISA versions. 2020-09-03 11:11:51 +08:00
attr-merge-priv-spec-01.d RISC-V: The object without priv spec attributes can be linked with any object. 2020-06-05 12:20:53 +08:00
attr-merge-priv-spec-02.d RISC-V: The object without priv spec attributes can be linked with any object. 2020-06-05 12:20:53 +08:00
attr-merge-priv-spec-03.d RISC-V: The object without priv spec attributes can be linked with any object. 2020-06-05 12:20:53 +08:00
attr-merge-priv-spec-a.s [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions and CSR 2020-05-20 17:22:48 +01:00
attr-merge-priv-spec-b.s [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions and CSR 2020-05-20 17:22:48 +01:00
attr-merge-priv-spec-c.s RISC-V: The object without priv spec attributes can be linked with any object. 2020-06-05 12:20:53 +08:00
attr-merge-priv-spec-d.s RISC-V: The object without priv spec attributes can be linked with any object. 2020-06-05 12:20:53 +08:00
attr-merge-priv-spec-failed-01.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-02.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-03.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-04.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-05.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-06.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-stack-align-a.s
attr-merge-stack-align-b.s
attr-merge-stack-align-failed-a.s
attr-merge-stack-align-failed-b.s
attr-merge-stack-align-failed.d
attr-merge-stack-align.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-01.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-01a.s
attr-merge-strict-align-01b.s
attr-merge-strict-align-02.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-02a.s
attr-merge-strict-align-02b.s
attr-merge-strict-align-03.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-03a.s
attr-merge-strict-align-03b.s
attr-merge-strict-align-04.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-04a.s
attr-merge-strict-align-04b.s
attr-merge-strict-align-05.d RISC-V: Don't generate the ELF privilege attributes when no CSR are used. 2020-06-05 12:14:44 +08:00
attr-merge-strict-align-05a.s
attr-merge-strict-align-05b.s
attr-phdr.d RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR. 2021-07-06 11:34:36 +08:00
attr-phdr.s RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR. 2021-07-06 11:34:36 +08:00
c-lui-2.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
c-lui-2.ld
c-lui-2.s
c-lui.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
c-lui.s
call-relax-0.s RISC-V: Fix ld relax failure with calls and align directives. 2019-11-12 15:53:22 -08:00
call-relax-1.s RISC-V: Fix ld relax failure with calls and align directives. 2019-11-12 15:53:22 -08:00
call-relax-2.s RISC-V: Fix ld relax failure with calls and align directives. 2019-11-12 15:53:22 -08:00
call-relax-3.s RISC-V: Fix ld relax failure with calls and align directives. 2019-11-12 15:53:22 -08:00
call-relax.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
disas-jalr.d
disas-jalr.s
gp-test-lib.sd
gp-test.s
gp-test.sd
ifunc-nonplt-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-got-overwrite-exe.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite-pic.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite-pie.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite.d RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite.s RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-reloc-call-01-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-nonplt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-pcrel.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-plt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-exe.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-pcrel-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-pcrel-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-exe.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-resolver.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ld-riscv-elf.exp RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
lib-nopic-01a.s RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in check_relocs. 2020-08-28 09:37:35 +08:00
lib-nopic-01b.d RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in check_relocs. 2020-08-28 09:37:35 +08:00
lib-nopic-01b.s RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in check_relocs. 2020-08-28 09:37:35 +08:00
pcgp-relax-01.d RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcgp-relax-01.s RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcgp-relax-02.d RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcgp-relax-02.s RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcrel-lo-addend-2a.d RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2a.s RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2b.d RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2b.s RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-3.ld RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3a.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3a.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3b.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3b.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3c.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3c.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
pcrel-lo-addend.s
relax-twice-1.s elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relax-twice-2.s elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relax-twice.ver elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relro-relax-lui.d RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-lui.s RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-pcrel.d RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-pcrel.s RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
variant_cc-1.s RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-2.s RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-now.d RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-r.d RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-shared.d RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
weakref32.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
weakref32.s
weakref64.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
weakref64.s
weakref.ld