Yao Qi bb11dd5839 [AArch64] Mark LR clobbered by BL in inline asm ... LR is a caller-save register, so, if inline asm does BL (which touches LR), we should mark LR clobbered. gdb/testsuite: 2017-10-27 Yao Qi <yao.qi@linaro.org> * gdb.arch/insn-reloc.c (can_relocate_bl): Mark "x30" clobbered.		2017-10-27 15:29:24 +01:00
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aarch64-atomic-inst.c
aarch64-atomic-inst.exp
aarch64-fp.c
aarch64-fp.exp
alpha-step.c
alpha-step.exp
altivec-abi.c
altivec-abi.exp
altivec-regs.c
altivec-regs.exp
amd64-byte.exp
amd64-disp-step.exp
amd64-disp-step.S
amd64-dword.exp
amd64-entry-value-inline.c
amd64-entry-value-inline.exp
amd64-entry-value-inline.S
amd64-entry-value-param-dwarf5.c
amd64-entry-value-param-dwarf5.exp
amd64-entry-value-param-dwarf5.S
amd64-entry-value-param.c
amd64-entry-value-param.exp
amd64-entry-value-param.S
amd64-entry-value-paramref.cc
amd64-entry-value-paramref.exp
amd64-entry-value-paramref.S
amd64-entry-value.cc
amd64-entry-value.exp
amd64-entry-value.s
amd64-gs_base.c
amd64-gs_base.exp
amd64-i386-address.exp
amd64-i386-address.S
amd64-invalid-stack-middle.c
amd64-invalid-stack-middle.exp
amd64-invalid-stack-middle.S
amd64-invalid-stack-top.c
amd64-invalid-stack-top.exp
amd64-optimout-repeat.c
amd64-optimout-repeat.exp
amd64-optimout-repeat.S
amd64-prologue-skip.exp
amd64-prologue-skip.S
amd64-prologue-xmm.c
amd64-prologue-xmm.exp
amd64-prologue-xmm.s
amd64-pseudo.c
amd64-stap-optional-prefix.exp
amd64-stap-optional-prefix.S
amd64-stap-special-operands.exp
amd64-stap-three-arg-disp.c
amd64-stap-three-arg-disp.S
amd64-stap-triplet.c
amd64-stap-triplet.S
amd64-stap-wrong-subexp.exp
amd64-stap-wrong-subexp.S
amd64-tailcall-cxx1.cc
amd64-tailcall-cxx1.S
amd64-tailcall-cxx2.cc
amd64-tailcall-cxx2.S
amd64-tailcall-cxx.exp
amd64-tailcall-noret.c
amd64-tailcall-noret.exp
amd64-tailcall-noret.S
amd64-tailcall-ret.c
amd64-tailcall-ret.exp
amd64-tailcall-ret.S
amd64-tailcall-self.c
amd64-tailcall-self.exp
amd64-tailcall-self.S
amd64-word.exp
arc-analyze-prologue.exp
arc-analyze-prologue.S
arc-decode-insn.exp
arc-decode-insn.S
arc-tdesc-cpu.exp	Fix unstable test names in gdb.arch/arc-tdesc-cpu.exp	2017-10-24 10:43:33 +01:00
arc-tdesc-cpu.xml	arc: Pass proper CPU value to the disassembler	2017-10-11 15:42:52 +03:00
arm-bl-branch-dest.c
arm-bl-branch-dest.exp
arm-disassembler-options.exp
arm-disp-step.exp
arm-disp-step.S
arm-neon.c
arm-neon.exp
arm-single-step-kernel-helper.c
arm-single-step-kernel-helper.exp
avr-flash-qualifier.c
avr-flash-qualifier.exp
cordic.ko.bz2
cordic.ko.debug.bz2
disp-step-insn-reloc.exp
e500-abi.c
e500-abi.exp
e500-prologue.c
e500-prologue.exp
e500-regs.c
e500-regs.exp
ftrace-insn-reloc.exp
gdb1291.exp
gdb1291.s
gdb1431.exp
gdb1431.s
gdb1558.c
gdb1558.exp
i386-avx512.c	gdb - avx512: tests were failing due to missing memory aligment.	2017-09-20 13:42:21 +02:00
i386-avx512.exp
i386-avx.c
i386-avx.exp
i386-biarch-core.core.bz2
i386-biarch-core.exp
i386-bp_permanent.c
i386-bp_permanent.exp
i386-byte.exp
i386-cfi-notcurrent.exp
i386-cfi-notcurrent.S
i386-disp-step.exp
i386-disp-step.S
i386-dr3-watch.c
i386-dr3-watch.exp
i386-float.exp
i386-float.S
i386-gnu-cfi-asm.S
i386-gnu-cfi.c
i386-gnu-cfi.exp
i386-mpx-call.c
i386-mpx-call.exp
i386-mpx-map.c
i386-mpx-map.exp
i386-mpx-sigsegv.c
i386-mpx-sigsegv.exp
i386-mpx-simple_segv.c
i386-mpx-simple_segv.exp
i386-mpx.c
i386-mpx.exp
i386-permbkpt.exp
i386-permbkpt.S
i386-pkru.c
i386-pkru.exp
i386-prologue.c
i386-prologue.exp
i386-pseudo.c
i386-signal.c
i386-signal.exp
i386-size-overlap.c
i386-size-overlap.exp
i386-size.c
i386-size.exp
i386-sse-stack-align.c
i386-sse-stack-align.exp
i386-sse-stack-align.S
i386-sse.c
i386-sse.exp
i386-stap-eval-lang-ada.c
i386-stap-eval-lang-ada.exp
i386-stap-eval-lang-ada.S
i386-unwind.c
i386-unwind.exp
i386-word.exp
ia64-breakpoint-shadow.exp
ia64-breakpoint-shadow.S
insn-reloc.c	[AArch64] Mark LR clobbered by BL in inline asm	2017-10-27 15:29:24 +01:00
iwmmxt-regs.c
iwmmxt-regs.exp
mips16-thunks-inmain.c
mips16-thunks-main.c
mips16-thunks-sin.c
mips16-thunks-sinfrob16.c
mips16-thunks-sinfrob.c
mips16-thunks-sinmain.c
mips16-thunks-sinmips16.c
mips16-thunks.exp
mips-fcr.c
mips-fcr.exp
mips-octeon-bbit.c
mips-octeon-bbit.exp
pa64-nullify.s
pa-nullify.exp
pa-nullify.s
powerpc-aix-prologue.c
powerpc-aix-prologue.exp
powerpc-altivec2.exp
powerpc-altivec2.s
powerpc-altivec3.exp
powerpc-altivec3.s
powerpc-altivec.exp
powerpc-altivec.s
powerpc-d128-regs.c
powerpc-d128-regs.exp
powerpc-disassembler-options.exp
powerpc-power7.exp
powerpc-power7.s
powerpc-power8.exp
powerpc-power8.s
powerpc-power9.exp
powerpc-power9.s
powerpc-prologue.c
powerpc-prologue.exp
powerpc-stackless.exp
powerpc-stackless.S
powerpc-vsx2.exp
powerpc-vsx2.s
powerpc-vsx3.exp
powerpc-vsx3.s
powerpc-vsx.exp
powerpc-vsx.s
ppc64-atomic-inst.exp
ppc64-atomic-inst.S
ppc64-isa207-atomic-inst.c
ppc64-isa207-atomic-inst.exp
ppc64-isa207-atomic-inst.S
ppc64-symtab-cordic.exp
ppc-dfp.c
ppc-dfp.exp
ppc-fp.c
ppc-fp.exp
s390-disassembler-options.exp
s390-multiarch.c
s390-multiarch.exp
s390-stackless.exp
s390-stackless.S
s390-tdbregs.c
s390-tdbregs.exp
s390-vregs.exp
s390-vregs.S
sparc64-adi.c
sparc64-adi.exp
sparc64-regs.exp
sparc64-regs.S
sparc-sysstep.c
sparc-sysstep.exp
spu-info.c
spu-info.exp
spu-ls.c
spu-ls.exp
thumb2-it.exp
thumb2-it.S
thumb-bx-pc.exp
thumb-bx-pc.S
thumb-prologue.c
thumb-prologue.exp
thumb-singlestep.exp
thumb-singlestep.S
vsx-regs.c
vsx-regs.exp