Jeff Law c1bce9f662 * interp.c (FPSCR, FPUL): Define. ... (struct save_state): Add fields for floating point registers, FPSCR and FPUL. (sim_resume): Add 'F' for accessing floating point registers in the save state structure. * gencode.c: Add sh3e opcodes. (gensym): Define a buffer for int<->fp conversions. First cut at simulating sh3e instructions. Basic stuff should work; instructions using fpul and fpscr are completely untested... Sanitized away for now (sh3e).		1995-08-31 04:21:32 +00:00
..
arm	Update FSF address.	1995-08-02 03:41:12 +00:00
h8300	* h8300.mt: Removed.	1995-07-05 23:16:38 +00:00
ppc	Add PowerPC simulator from Andrew Cagney <cagney@highland.com.au>	1995-08-23 21:06:36 +00:00
sh	* interp.c (FPSCR, FPUL): Define.	1995-08-31 04:21:32 +00:00
w65	Document FSF address updating of all files with FSF addresses,	1995-08-03 18:42:27 +00:00
.Sanitize	Add PowerPC simulator from Andrew Cagney <cagney@highland.com.au>	1995-08-23 21:06:36 +00:00
ChangeLog	Add PowerPC simulator from Andrew Cagney <cagney@highland.com.au>	1995-08-23 21:06:36 +00:00
configure	Add PowerPC simulator from Andrew Cagney <cagney@highland.com.au>	1995-08-23 21:06:36 +00:00
configure.in	Only build PowerPC simulator if target is powerpc*-*-eabisim	1995-08-25 16:05:32 +00:00
Makefile.in	* Makefile.in, configure.in: converted to autoconf.	1995-07-05 22:54:10 +00:00