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ebf0b03c70
Remove an inconsistency in linker error message processing causing that it depends on the ability to infer the name of the originating source file whether or not the name of the offending function is repeated by clever formatters for each issue reported within the function. Taking the `ld/testsuite/ld-powerpc/tocopt7.s' test case source as an example and the `powerpc-linux' target we have: $ as -gdwarf2 -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ vs: $ as -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': (.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. tocopt.o: In function `_start': (.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ Similarly with the `mips-linux' target and this source: $ cat jal-global-multi-overflow.s .text .set noreorder .space 0x2000 .align 4 .globl foo .ent foo foo: jal bar nor $0, $0 jal bar nor $0, $0 .end foo .space 0x1ff0 .align 4 .globl bar .ent bar bar: jal foo nor $0, $0 jal foo nor $0, $0 .end bar $ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s $ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o jal-global-multi-overflow.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `foo': (.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo' jal-global-multi-overflow.o: In function `bar': (.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo' $ Not only this is inconsistent, but it causes output clutter as well with redundant information. The cause for this is a check in `vfinfo' the intent of which is to print the function heading whenever (among others) the name of the source file has changed, which however does not take into account a situation where the name couldn't have been established both now and previously. Adjust the check then for this situation, yielding: $ as -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': (.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. (.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ and: $ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s $ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o jal-global-multi-overflow.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar' (.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo' (.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo' $ respectively instead. Adjust the test suite accordingly. ld/ * ldmisc.c (vfinfo): Don't print the function name again either if no source file name has been found both now and previously. * testsuite/ld-cris/tls-err-20x.d: Adjust accordingly. * testsuite/ld-mips-elf/mode-change-error-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise. * testsuite/ld-powerpc/tocopt.out: Likewise. * testsuite/ld-powerpc/tocopt7.out: Likewise.
82 lines
6.2 KiB
Makefile
82 lines
6.2 KiB
Makefile
#name: microMIPS link branch to unaligned symbol
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#as: -EB -n32 -march=from-abi
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#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
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#source: ../../../gas/testsuite/gas/mips/unaligned-branch-micromips-2.s
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#error: \A[^\n]*: In function `foo':\n
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#error: \(\.text\+0x100a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1012\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x101a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x102a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1032\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x103a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1062\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x1072\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x1082\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1088\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1088\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x108e\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x108e\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1094\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1094\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x109a\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10a0\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10a0\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10a6\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10a6\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10ac\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10ac\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10b2\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10ca\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x10d6\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x10e2\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10e8\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10e8\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10ee\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10ee\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10f4\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x10f4\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x10fa\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1100\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1100\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1106\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1106\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x110c\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x110c\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1112\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x112a\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x1136\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x1142\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1146\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1146\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x114a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x114a\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x114e\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x114e\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1152\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1156\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1156\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x115a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x115a\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x115e\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x115e\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1162\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1172\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x117a\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x1182\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1186\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1186\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x118a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x118a\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x118e\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x118e\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1192\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x1196\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x1196\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x119a\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x119a\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x119e\): Cannot convert a branch to JALX for a non-word-aligned address\n
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#error: \(\.text\+0x119e\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x11a2\): Unsupported branch between ISA modes\n
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#error: \(\.text\+0x11b2\): Branch to a non-instruction-aligned address\n
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#error: \(\.text\+0x11ba\): Branch to a non-instruction-aligned address\Z
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