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548 lines
15 KiB
C
548 lines
15 KiB
C
/* GNU/Linux on ARM native support.
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Copyright 1999 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include <sys/user.h>
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#include <sys/ptrace.h>
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#include <sys/utsname.h>
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extern int arm_apcs_32;
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#define typeNone 0x00
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#define typeSingle 0x01
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#define typeDouble 0x02
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#define typeExtended 0x03
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#define FPWORDS 28
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#define CPSR_REGNUM 16
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typedef union tagFPREG
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{
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unsigned int fSingle;
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unsigned int fDouble[2];
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unsigned int fExtended[3];
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}
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FPREG;
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typedef struct tagFPA11
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{
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FPREG fpreg[8]; /* 8 floating point registers */
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unsigned int fpsr; /* floating point status register */
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unsigned int fpcr; /* floating point control register */
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unsigned char fType[8]; /* type of floating point value held in
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floating point registers. */
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int initflag; /* NWFPE initialization flag. */
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}
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FPA11;
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/* The following variables are used to determine the version of the
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underlying Linux operating system. Examples:
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Linux 2.0.35 Linux 2.2.12
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os_version = 0x00020023 os_version = 0x0002020c
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os_major = 2 os_major = 2
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os_minor = 0 os_minor = 2
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os_release = 35 os_release = 12
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Note: os_version = (os_major << 16) | (os_minor << 8) | os_release
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These are initialized using get_linux_version() from
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_initialize_arm_linux_nat(). */
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static unsigned int os_version, os_major, os_minor, os_release;
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static void
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fetch_nw_fpe_single (unsigned int fn, FPA11 * fpa11, unsigned int *pmem)
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{
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unsigned int mem[3];
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mem[0] = fpa11->fpreg[fn].fSingle;
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mem[1] = 0;
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mem[2] = 0;
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supply_register (F0_REGNUM + fn, (char *) &mem[0]);
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}
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static void
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fetch_nw_fpe_double (unsigned int fn, FPA11 * fpa11, unsigned int *pmem)
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{
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unsigned int mem[3];
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mem[0] = fpa11->fpreg[fn].fDouble[1];
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mem[1] = fpa11->fpreg[fn].fDouble[0];
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mem[2] = 0;
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supply_register (F0_REGNUM + fn, (char *) &mem[0]);
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}
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static void
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fetch_nw_fpe_none (unsigned int fn, FPA11 * fpa11, unsigned int *pmem)
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{
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unsigned int mem[3] =
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{0, 0, 0};
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supply_register (F0_REGNUM + fn, (char *) &mem[0]);
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}
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static void
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fetch_nw_fpe_extended (unsigned int fn, FPA11 * fpa11, unsigned int *pmem)
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{
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unsigned int mem[3];
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mem[0] = fpa11->fpreg[fn].fExtended[0]; /* sign & exponent */
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mem[1] = fpa11->fpreg[fn].fExtended[2]; /* ls bits */
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mem[2] = fpa11->fpreg[fn].fExtended[1]; /* ms bits */
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supply_register (F0_REGNUM + fn, (char *) &mem[0]);
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}
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static void
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store_nw_fpe_single (unsigned int fn, FPA11 * fpa11)
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{
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unsigned int mem[3];
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read_register_gen (F0_REGNUM + fn, (char *) &mem[0]);
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fpa11->fpreg[fn].fSingle = mem[0];
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fpa11->fType[fn] = typeSingle;
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}
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static void
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store_nw_fpe_double (unsigned int fn, FPA11 * fpa11)
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{
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unsigned int mem[3];
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read_register_gen (F0_REGNUM + fn, (char *) &mem[0]);
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fpa11->fpreg[fn].fDouble[1] = mem[0];
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fpa11->fpreg[fn].fDouble[0] = mem[1];
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fpa11->fType[fn] = typeDouble;
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}
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void
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store_nw_fpe_extended (unsigned int fn, FPA11 * fpa11)
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{
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unsigned int mem[3];
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read_register_gen (F0_REGNUM + fn, (char *) &mem[0]);
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fpa11->fpreg[fn].fExtended[0] = mem[0]; /* sign & exponent */
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fpa11->fpreg[fn].fExtended[2] = mem[1]; /* ls bits */
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fpa11->fpreg[fn].fExtended[1] = mem[2]; /* ms bits */
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fpa11->fType[fn] = typeDouble;
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}
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/* Get the whole floating point state of the process and store the
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floating point stack into registers[]. */
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static void
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fetch_fpregs (void)
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{
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int ret, regno;
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FPA11 fp;
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/* Read the floating point state. */
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ret = ptrace (PT_GETFPREGS, inferior_pid, 0, &fp);
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if (ret < 0)
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{
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warning ("Unable to fetch the floating point state.");
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return;
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}
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/* Fetch fpsr. */
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supply_register (FPS_REGNUM, (char *) &fp.fpsr);
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/* Fetch the floating point registers. */
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for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++)
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{
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int fn = regno - F0_REGNUM;
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unsigned int *p = (unsigned int *) ®isters[REGISTER_BYTE (regno)];
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switch (fp.fType[fn])
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{
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case typeSingle:
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fetch_nw_fpe_single (fn, &fp, p);
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break;
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case typeDouble:
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fetch_nw_fpe_double (fn, &fp, p);
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break;
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case typeExtended:
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fetch_nw_fpe_extended (fn, &fp, p);
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break;
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default:
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fetch_nw_fpe_none (fn, &fp, p);
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}
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}
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}
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/* Save the whole floating point state of the process using
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the contents from registers[]. */
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static void
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store_fpregs (void)
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{
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int ret, regno;
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unsigned int mem[3];
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FPA11 fp;
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/* Store fpsr. */
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if (register_valid[FPS_REGNUM])
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read_register_gen (FPS_REGNUM, (char *) &fp.fpsr);
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/* Store the floating point registers. */
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for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++)
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{
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if (register_valid[regno])
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{
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unsigned int fn = regno - F0_REGNUM;
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switch (fp.fType[fn])
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{
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case typeSingle:
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store_nw_fpe_single (fn, &fp);
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break;
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case typeDouble:
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store_nw_fpe_double (fn, &fp);
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break;
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case typeExtended:
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store_nw_fpe_extended (fn, &fp);
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break;
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}
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}
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}
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ret = ptrace (PTRACE_SETFPREGS, inferior_pid, 0, &fp);
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if (ret < 0)
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{
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warning ("Unable to store floating point state.");
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return;
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}
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}
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/* Fetch all general registers of the process and store into
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registers[]. */
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static void
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fetch_regs (void)
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{
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int ret, regno;
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struct pt_regs regs;
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ret = ptrace (PTRACE_GETREGS, inferior_pid, 0, ®s);
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if (ret < 0)
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{
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warning ("Unable to fetch general registers.");
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return;
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}
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for (regno = A1_REGNUM; regno < PC_REGNUM; regno++)
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supply_register (regno, (char *) ®s.uregs[regno]);
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if (arm_apcs_32)
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supply_register (PS_REGNUM, (char *) ®s.uregs[CPSR_REGNUM]);
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else
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supply_register (PS_REGNUM, (char *) ®s.uregs[PC_REGNUM]);
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regs.uregs[PC_REGNUM] = ADDR_BITS_REMOVE (regs.uregs[PC_REGNUM]);
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supply_register (PC_REGNUM, (char *) ®s.uregs[PC_REGNUM]);
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}
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/* Store all general registers of the process from the values in
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registers[]. */
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static void
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store_regs (void)
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{
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int ret, regno;
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struct pt_regs regs;
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ret = ptrace (PTRACE_GETREGS, inferior_pid, 0, ®s);
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if (ret < 0)
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{
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warning ("Unable to fetch general registers.");
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return;
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}
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for (regno = A1_REGNUM; regno <= PC_REGNUM; regno++)
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{
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if (register_valid[regno])
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read_register_gen (regno, (char *) ®s.uregs[regno]);
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}
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ret = ptrace (PTRACE_SETREGS, inferior_pid, 0, ®s);
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if (ret < 0)
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{
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warning ("Unable to store general registers.");
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return;
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}
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}
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/* Fetch registers from the child process. Fetch all registers if
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regno == -1, otherwise fetch all general registers or all floating
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point registers depending upon the value of regno. */
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void
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fetch_inferior_registers (int regno)
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{
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if ((regno < F0_REGNUM) || (regno > FPS_REGNUM))
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fetch_regs ();
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if (((regno >= F0_REGNUM) && (regno <= FPS_REGNUM)) || (regno == -1))
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fetch_fpregs ();
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}
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/* Store registers back into the inferior. Store all registers if
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regno == -1, otherwise store all general registers or all floating
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point registers depending upon the value of regno. */
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void
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store_inferior_registers (int regno)
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{
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if ((regno < F0_REGNUM) || (regno > FPS_REGNUM))
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store_regs ();
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if (((regno >= F0_REGNUM) && (regno <= FPS_REGNUM)) || (regno == -1))
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store_fpregs ();
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}
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#ifdef GET_LONGJMP_TARGET
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/* Figure out where the longjmp will land. We expect that we have
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just entered longjmp and haven't yet altered r0, r1, so the
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arguments are still in the registers. (A1_REGNUM) points at the
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jmp_buf structure from which we extract the pc (JB_PC) that we will
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land at. The pc is copied into ADDR. This routine returns true on
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success. */
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#define LONGJMP_TARGET_SIZE sizeof(int)
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#define JB_ELEMENT_SIZE sizeof(int)
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#define JB_SL 18
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#define JB_FP 19
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#define JB_SP 20
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#define JB_PC 21
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int
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arm_get_longjmp_target (CORE_ADDR * pc)
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{
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CORE_ADDR jb_addr;
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char buf[LONGJMP_TARGET_SIZE];
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jb_addr = read_register (A1_REGNUM);
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if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
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LONGJMP_TARGET_SIZE))
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return 0;
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*pc = extract_address (buf, LONGJMP_TARGET_SIZE);
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return 1;
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}
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#endif /* GET_LONGJMP_TARGET */
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/*
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Dynamic Linking on ARM Linux
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----------------------------
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Note: PLT = procedure linkage table
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GOT = global offset table
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As much as possible, ELF dynamic linking defers the resolution of
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jump/call addresses until the last minute. The technique used is
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inspired by the i386 ELF design, and is based on the following
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constraints.
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1) The calling technique should not force a change in the assembly
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code produced for apps; it MAY cause changes in the way assembly
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code is produced for position independent code (i.e. shared
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libraries).
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2) The technique must be such that all executable areas must not be
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modified; and any modified areas must not be executed.
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To do this, there are three steps involved in a typical jump:
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1) in the code
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2) through the PLT
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3) using a pointer from the GOT
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When the executable or library is first loaded, each GOT entry is
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initialized to point to the code which implements dynamic name
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resolution and code finding. This is normally a function in the
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program interpreter (on ARM Linux this is usually ld-linux.so.2,
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but it does not have to be). On the first invocation, the function
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is located and the GOT entry is replaced with the real function
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address. Subsequent calls go through steps 1, 2 and 3 and end up
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calling the real code.
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1) In the code:
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b function_call
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bl function_call
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This is typical ARM code using the 26 bit relative branch or branch
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and link instructions. The target of the instruction
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(function_call is usually the address of the function to be called.
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In position independent code, the target of the instruction is
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actually an entry in the PLT when calling functions in a shared
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library. Note that this call is identical to a normal function
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call, only the target differs.
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2) In the PLT:
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The PLT is a synthetic area, created by the linker. It exists in
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both executables and libraries. It is an array of stubs, one per
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imported function call. It looks like this:
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PLT[0]:
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str lr, [sp, #-4]! @push the return address (lr)
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ldr lr, [pc, #16] @load from 6 words ahead
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add lr, pc, lr @form an address for GOT[0]
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ldr pc, [lr, #8]! @jump to the contents of that addr
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The return address (lr) is pushed on the stack and used for
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calculations. The load on the second line loads the lr with
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&GOT[3] - . - 20. The addition on the third leaves:
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lr = (&GOT[3] - . - 20) + (. + 8)
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lr = (&GOT[3] - 12)
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lr = &GOT[0]
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On the fourth line, the pc and lr are both updated, so that:
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pc = GOT[2]
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lr = &GOT[0] + 8
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= &GOT[2]
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NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
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"tight", but allows us to keep all the PLT entries the same size.
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PLT[n+1]:
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ldr ip, [pc, #4] @load offset from gotoff
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add ip, pc, ip @add the offset to the pc
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ldr pc, [ip] @jump to that address
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gotoff: .word GOT[n+3] - .
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The load on the first line, gets an offset from the fourth word of
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the PLT entry. The add on the second line makes ip = &GOT[n+3],
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which contains either a pointer to PLT[0] (the fixup trampoline) or
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a pointer to the actual code.
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3) In the GOT:
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The GOT contains helper pointers for both code (PLT) fixups and
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data fixups. The first 3 entries of the GOT are special. The next
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M entries (where M is the number of entries in the PLT) belong to
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the PLT fixups. The next D (all remaining) entries belong to
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various data fixups. The actual size of the GOT is 3 + M + D.
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The GOT is also a synthetic area, created by the linker. It exists
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in both executables and libraries. When the GOT is first
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initialized , all the GOT entries relating to PLT fixups are
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pointing to code back at PLT[0].
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The special entries in the GOT are:
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GOT[0] = linked list pointer used by the dynamic loader
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GOT[1] = pointer to the reloc table for this module
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GOT[2] = pointer to the fixup/resolver code
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The first invocation of function call comes through and uses the
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fixup/resolver code. On the entry to the fixup/resolver code:
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ip = &GOT[n+3]
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lr = &GOT[2]
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stack[0] = return address (lr) of the function call
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[r0, r1, r2, r3] are still the arguments to the function call
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This is enough information for the fixup/resolver code to work
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with. Before the fixup/resolver code returns, it actually calls
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the requested function and repairs &GOT[n+3]. */
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CORE_ADDR
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arm_skip_solib_resolver (CORE_ADDR pc)
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{
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/* FIXME */
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return 0;
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}
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int
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arm_linux_register_u_addr (int blockend, int regnum)
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{
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return blockend + REGISTER_BYTE (regnum);
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}
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int
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arm_linux_kernel_u_size (void)
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{
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return (sizeof (struct user));
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}
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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void
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arm_linux_extract_return_value (struct type *type,
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char regbuf[REGISTER_BYTES],
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char *valbuf)
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{
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/* ScottB: This needs to be looked at to handle the different
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floating point emulators on ARM Linux. Right now the code
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assumes that fetch inferior registers does the right thing for
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GDB. I suspect this won't handle NWFPE registers correctly, nor
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will the default ARM version (arm_extract_return_value()). */
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int regnum = (TYPE_CODE_FLT == TYPE_CODE (type)) ? F0_REGNUM : A1_REGNUM;
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memcpy (valbuf, ®buf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
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}
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static unsigned int
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get_linux_version (unsigned int *vmajor,
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unsigned int *vminor,
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unsigned int *vrelease)
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{
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struct utsname info;
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char *pmajor, *pminor, *prelease, *tail;
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if (-1 == uname (&info))
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{
|
|
warning ("Unable to determine Linux version.");
|
|
return -1;
|
|
}
|
|
|
|
pmajor = strtok (info.release, ".");
|
|
pminor = strtok (NULL, ".");
|
|
prelease = strtok (NULL, ".");
|
|
|
|
*vmajor = (unsigned int) strtoul (pmajor, &tail, 0);
|
|
*vminor = (unsigned int) strtoul (pminor, &tail, 0);
|
|
*vrelease = (unsigned int) strtoul (prelease, &tail, 0);
|
|
|
|
return ((*vmajor << 16) | (*vminor << 8) | *vrelease);
|
|
}
|
|
|
|
void
|
|
_initialize_arm_linux_nat (void)
|
|
{
|
|
os_version = get_linux_version (&os_major, &os_minor, &os_release);
|
|
}
|