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236 lines
8.1 KiB
Plaintext
236 lines
8.1 KiB
Plaintext
@c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node M68HC11-Dependent
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@chapter M68HC11 and M68HC12 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter M68HC11 and M68HC12 Dependent Features
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@end ifclear
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@cindex M68HC11 and M68HC12 support
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@menu
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* M68HC11-Opts:: M68HC11 and M68HC12 Options
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* M68HC11-Syntax:: Syntax
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* M68HC11-Float:: Floating Point
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* M68HC11-opcodes:: Opcodes
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@end menu
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@node M68HC11-Opts
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@section M68HC11 and M68HC12 Options
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@cindex options, M68HC11
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@cindex M68HC11 options
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The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} has a few machine
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dependent options.
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@cindex @samp{-m68hc11}
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This option switches the assembler in the M68HC11 mode. In this mode,
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the assembler only accepts 68HC11 operands and mnemonics. It produces
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code for the 68HC11.
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@cindex @samp{-m68hc12}
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This option switches the assembler in the M68HC12 mode. In this mode,
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the assembler also accepts 68HC12 operands and mnemonics. It produces
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code for the 68HC12. A fiew 68HC11 instructions are replaced by
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some 68HC12 instructions as recommended by Motorola specifications.
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@cindex @samp{--strict-direct-mode}
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You can use the @samp{--strict-direct-mode} option to disable
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the automatic translation of direct page mode addressing into
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extended mode when the instruction does not support direct mode.
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For example, the @samp{clr} instruction does not support direct page
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mode addressing. When it is used with the direct page mode,
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@code{@value{AS}} will ignore it and generate an absolute addressing.
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This option prevents @code{@value{AS}} from doing this, and the wrong
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usage of the direct page mode will raise an error.
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@cindex @samp{--short-branchs}
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The @samp{--short-branchs} option turns off the translation of
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relative branches into absolute branches when the branch offset is
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out of range. By default @code{@value{AS}} transforms the relative
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branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
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@samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls},
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@samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into
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an absolute branch when the offset is out of the -128 .. 127 range.
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In that case, the @samp{bsr} instruction is translated into a
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@samp{jsr}, the @samp{bra} instruction is translated into a
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@samp{jmp} and the conditional branchs instructions are inverted and
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followed by a @samp{jmp}. This option disables these translations
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and @code{@value{AS}} will generate an error if a relative branch
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is out of range. This option does not affect the optimization
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associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
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@cindex @samp{--force-long-branchs}
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The @samp{--force-long-branchs} option forces the translation of
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relative branches into absolute branches. This option does not affect
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the optimization associated to the @samp{jbra}, @samp{jbsr} and
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@samp{jbXX} pseudo opcodes.
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@cindex @samp{--print-insn-syntax}
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You can use the @samp{--print-insn-syntax} option to obtain the
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syntax description of the instruction when an error is detected.
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@cindex @samp{--print-opcodes}
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The @samp{--print-opcodes} option prints the list of all the
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instructions with their syntax. The first item of each line
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represents the instruction name and the rest of the line indicates
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the possible operands for that instruction. The list is printed
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in alphabetical order. Once the list is printed @code{@value{AS}}
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exits.
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@cindex @samp{--generate-example}
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The @samp{--generate-example} option is similar to @samp{--print-opcodes}
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but it generates an example for each instruction instead.
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@node M68HC11-Syntax
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@section Syntax
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@cindex M68HC11 syntax
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@cindex syntax, M68HC11
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In the M68HC11 syntax, the instruction name comes first and it may
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be followed by one or several operands (up to three). Operands are
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separated by comma (@samp{,}). In the normal mode,
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@code{@value{AS}} will complain if too many operands are specified for
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a given instruction. In the MRI mode (turned on with @samp{-M} option),
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it will treat them as comments. Example:
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@smallexample
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inx
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lda #23
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bset 2,x #4
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brclr *bot #8 foo
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@end smallexample
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@cindex M68HC11 addressing modes
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@cindex addressing modes, M68HC11
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The following addressing modes are understood:
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@table @dfn
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@item Immediate
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@samp{#@var{number}}
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@item Address Register
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@samp{@var{number},X}, @samp{@var{number},Y}
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The @var{number} may be omitted in which case 0 is assumed.
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@item Direct Addressing mode
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@samp{*@var{symbol}}, or @samp{*@var{digits}}
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@item Absolute
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@samp{@var{symbol}}, or @samp{@var{digits}}
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@end table
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@node M68HC11-Float
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@section Floating Point
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@cindex floating point, M68HC11
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@cindex M68HC11 floating point
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Packed decimal (P) format floating literals are not supported.
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Feel free to add the code!
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The floating point formats generated by directives are these.
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@table @code
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@cindex @code{float} directive, M68HC11
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@item .float
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@code{Single} precision floating point constants.
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@cindex @code{double} directive, M68HC11
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@item .double
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@code{Double} precision floating point constants.
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@cindex @code{extend} directive M68HC11
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@cindex @code{ldouble} directive M68HC11
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@item .extend
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@itemx .ldouble
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@code{Extended} precision (@code{long double}) floating point constants.
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@end table
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@need 2000
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@node M68HC11-opcodes
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@section Opcodes
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@cindex M68HC11 opcodes
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@cindex opcodes, M68HC11
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@cindex instruction set, M68HC11
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@menu
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* M68HC11-Branch:: Branch Improvement
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@end menu
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@node M68HC11-Branch
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@subsection Branch Improvement
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@cindex pseudo-opcodes, M68HC11
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@cindex M68HC11 pseudo-opcodes
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@cindex branch improvement, M68HC11
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@cindex M68HC11 branch improvement
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Certain pseudo opcodes are permitted for branch instructions.
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They expand to the shortest branch instruction that reach the
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target. Generally these mnemonics are made by prepending @samp{j} to
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the start of Motorola mnemonic. These pseudo opcodes are not affected
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by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
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The following table summarizes the pseudo-operations.
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@smallexample
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Displacement Width
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+-------------------------------------------------------------+
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| Options |
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| --short-branchs --force-long-branchs |
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+--------------------------+----------------------------------+
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Pseudo-Op |BYTE WORD | BYTE WORD |
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+--------------------------+----------------------------------+
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bsr | bsr <pc-rel> <error> | jsr <abs> |
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bra | bra <pc-rel> <error> | jmp <abs> |
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jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
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jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
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bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
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jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
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| jmp <abs> | |
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+--------------------------+----------------------------------+
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XX: condition
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NX: negative of condition XX
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@end smallexample
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@table @code
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@item jbsr
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@itemx jbra
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These are the simplest jump pseudo-operations; they always map to one
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particular machine instruction, depending on the displacement to the
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branch target.
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@item jb@var{XX}
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Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
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where @var{XX} is a conditional branch or condition-code test. The full
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list of pseudo-ops in this family is:
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@smallexample
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jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
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jbcs jbne jblt jble jbls jbvc jbmi
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@end smallexample
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For the cases of non-PC relative displacements and long displacements,
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@code{@value{AS}} issues a longer code fragment in terms of
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@var{NX}, the opposite condition to @var{XX}. For example, for the
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non-PC relative case:
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@smallexample
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jb@var{XX} foo
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@end smallexample
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gives
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@smallexample
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b@var{NX}s oof
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jmp foo
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oof:
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@end smallexample
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@end table
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