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abd20cb637
I get the feedback recently that enable linker relaxations may fail to build some program. Consider the following case, .text foo: addi a0, a0, %pcrel_lo(.L2) call foo .L1: auipc a1, %pcrel_hi(data_g) addi a1, a1, %pcrel_lo(.L1) lui a2, %hi(data_g) addi a2, a2, %lo(data_g) lui a3, %tprel_hi(data_t) add a3, a3, tp, %tprel_add(data_t) addi a3, a3, %tprel_lo(data_t) .L2: auipc a0, %pcrel_hi(data_g) .data .word 0x0 .global data_g data_g: .word 0x1 .section .tbss data_t: .word 0x0 The current ld reports `dangerous relocation error` when doing the pcgp relaxation, test.o: in function `foo': (.text+0x0): dangerous relocation: %pcrel_lo missing matching %pcrel_hi The .L2 auipc should not be removed since it is behind the corresponding addi, so we record the information in the pcgp_relocs table to avoid removing the auipc later. But current ld still remove it since we do not update the pcgp_relocs table while doing other relaxations. I have two solutions to fix the problem, 1. Update the pcgp_relocs table once we actually delete the code. 2. Add new relax pass to do the pcgp relaxations At first I tried to do the first solution, and we need to update at least three information - hi_sec_off of riscv_pcgp_lo_reloc, hi_sec_off and hi_addr (symbol value) of riscv_pcgp_hi_reloc. Update the hi_sec_off is simple, but it is more complicate to update the symbol value, since we almost have to do parts the same works of _bfd_riscv_relax_call again in the riscv_relax_delete_bytes to get the correct symbol value. Compared with the first solution, the second one is more intuitive and simple. We add a new relax pass to do the pcgp relaxations later, so we will get all the information correctly in the _bfd_riscv_relax_call, including the symbol value, without changing so much code. I do not see any penalty by adding a new relax pass for now, so it should be fine to delay the pcgp relaxations. Besides, I have pass all riscv-gnu-toolchain regressions for this patch. bfd/ * elfnn-riscv.c (_bfd_riscv_relax_section): Add a new relax pass to do the pcgp relaxation later, after the lui and call relaxations, but before the delete and alignment relaxations. ld/ * emultempl/riscvelf.em (riscv_elf_before_allocation): Change link_info.relax_pass from 3 to 4. * testsuite/ld-riscv-elf/pcgp-relax.d: New testcase. * testsuite/ld-riscv-elf/pcgp-relax.s: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated. |
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| .. | ||
| aarch64elf.em | ||
| aix.em | ||
| alphaelf.em | ||
| arclinux.em | ||
| armcoff.em | ||
| armelf.em | ||
| astring.sed | ||
| avrelf.em | ||
| beos.em | ||
| bfin.em | ||
| cr16elf.em | ||
| crxelf.em | ||
| cskyelf.em | ||
| elf-generic.em | ||
| elf-x86.em | ||
| elf.em | ||
| epiphanyelf_4x4.em | ||
| genelf.em | ||
| generic.em | ||
| hppaelf.em | ||
| ia64elf.em | ||
| irix.em | ||
| linux.em | ||
| m68hc1xelf.em | ||
| m68kelf.em | ||
| metagelf.em | ||
| mipself.em | ||
| mmix-elfnmmo.em | ||
| mmixelf.em | ||
| mmo.em | ||
| msp430.em | ||
| nds32elf.em | ||
| needrelax.em | ||
| netbsd.em | ||
| nios2elf.em | ||
| ostring.sed | ||
| pdp11.em | ||
| pe.em | ||
| pep.em | ||
| ppc32elf.em | ||
| ppc64elf.em | ||
| pruelf.em | ||
| README | ||
| riscvelf.em | ||
| rxelf.em | ||
| rxlinux.em | ||
| s390.em | ||
| scoreelf.em | ||
| solaris2-x86.em | ||
| solaris2.em | ||
| spu_icache.o_c | ||
| spu_icache.S | ||
| spu_ovl.o_c | ||
| spu_ovl.S | ||
| spuelf.em | ||
| tic6xdsbt.em | ||
| ticoff.em | ||
| v850elf.em | ||
| vanilla.em | ||
| vms.em | ||
| vxworks.em | ||
| xtensaelf.em | ||
| z80.em | ||
The files in this directory are sourced by genscripts.sh, after
setting some variables to substitute in, to produce
C source files that contain jump tables for each emulation.
Copyright (C) 2012-2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
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