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137 lines
5.0 KiB
C
137 lines
5.0 KiB
C
/* Debug register code for x86 (i386 and x86-64).
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Copyright (C) 2009-2021 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef NAT_X86_DREGS_H
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#define NAT_X86_DREGS_H
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/* Support for hardware watchpoints and breakpoints using the x86
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debug registers.
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This provides several functions for inserting and removing
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hardware-assisted breakpoints and watchpoints, testing if one or
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more of the watchpoints triggered and at what address, checking
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whether a given region can be watched, etc.
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The functions below implement debug registers sharing by reference
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counts, and allow to watch regions up to 16 bytes long
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(32 bytes on 64 bit hosts). */
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#include "gdbsupport/break-common.h" /* target_hw_bp_type */
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/* Low-level function vector. */
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struct x86_dr_low_type
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{
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/* Set the debug control (DR7) register to a given value for
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all LWPs. May be NULL if the debug control register cannot
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be set. */
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void (*set_control) (unsigned long);
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/* Put an address into one debug register for all LWPs. May
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be NULL if debug registers cannot be set*/
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void (*set_addr) (int, CORE_ADDR);
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/* Return the address in a given debug register of the current
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LWP. */
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CORE_ADDR (*get_addr) (int);
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/* Return the value of the debug status (DR6) register for
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current LWP. */
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unsigned long (*get_status) (void);
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/* Return the value of the debug control (DR7) register for
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current LWP. */
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unsigned long (*get_control) (void);
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/* Number of bytes used for debug registers (4 or 8). */
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int debug_register_length;
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};
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extern struct x86_dr_low_type x86_dr_low;
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/* Debug registers' indices. */
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#define DR_FIRSTADDR 0
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#define DR_LASTADDR 3
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#define DR_NADDR 4 /* The number of debug address registers. */
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#define DR_STATUS 6 /* Index of debug status register (DR6). */
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#define DR_CONTROL 7 /* Index of debug control register (DR7). */
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/* Global state needed to track h/w watchpoints. */
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struct x86_debug_reg_state
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{
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/* Mirror the inferior's DRi registers. We keep the status and
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control registers separated because they don't hold addresses.
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Note that since we can change these mirrors while threads are
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running, we never trust them to explain a cause of a trap.
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For that, we need to peek directly in the inferior registers. */
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CORE_ADDR dr_mirror[DR_NADDR];
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unsigned dr_status_mirror, dr_control_mirror;
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/* Reference counts for each debug address register. */
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int dr_ref_count[DR_NADDR];
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};
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/* A macro to loop over all debug address registers. */
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#define ALL_DEBUG_ADDRESS_REGISTERS(i) \
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for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)
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/* Return a pointer to the local mirror of the debug registers of
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process PID. This function must be provided by the client
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if required. */
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extern struct x86_debug_reg_state *x86_debug_reg_state (pid_t pid);
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/* Insert a watchpoint to watch a memory region which starts at
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address ADDR and whose length is LEN bytes. Watch memory accesses
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of the type TYPE. Return 0 on success, -1 on failure. */
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extern int x86_dr_insert_watchpoint (struct x86_debug_reg_state *state,
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enum target_hw_bp_type type,
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CORE_ADDR addr,
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int len);
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/* Remove a watchpoint that watched the memory region which starts at
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address ADDR, whose length is LEN bytes, and for accesses of the
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type TYPE. Return 0 on success, -1 on failure. */
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extern int x86_dr_remove_watchpoint (struct x86_debug_reg_state *state,
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enum target_hw_bp_type type,
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CORE_ADDR addr,
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int len);
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/* Return non-zero if we can watch a memory region that starts at
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address ADDR and whose length is LEN bytes. */
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extern int x86_dr_region_ok_for_watchpoint (struct x86_debug_reg_state *state,
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CORE_ADDR addr, int len);
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/* If the inferior has some break/watchpoint that triggered, set the
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address associated with that break/watchpoint and return true.
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Otherwise, return false. */
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extern int x86_dr_stopped_data_address (struct x86_debug_reg_state *state,
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CORE_ADDR *addr_p);
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/* Return true if the inferior has some watchpoint that triggered.
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Otherwise return false. */
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extern int x86_dr_stopped_by_watchpoint (struct x86_debug_reg_state *state);
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/* Return true if the inferior has some hardware breakpoint that
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triggered. Otherwise return false. */
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extern int x86_dr_stopped_by_hw_breakpoint (struct x86_debug_reg_state *state);
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#endif /* NAT_X86_DREGS_H */
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