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Conversions which shrink element size and which have a memory source can't be disambiguated between their 128- and 256-bit variants by looking at the register operand. "operand size mismatch", however, is a pretty misleading diagnostic. Generalize the logic introduced for VFPCLASSP{S,D} such that, with suitable similar adjustments to the respective templates, it'll cover these cases too. For VCVTNEPS2BF16 also fold the two previously separate AVX512VL templates to achieve the intended effect. This is then also accompanied by a respective addition to the inval-avx512f testcase. |
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