H.J. Lu af5c13b01e x86: Don't disable SSE4a when disabling SSE4 ... commit 7deea9aad8 changed nosse4 to include CpuSSE4a. But AMD SSE4a is a superset of SSE3 and Intel SSE4 is a superset of SSSE3. Disable Intel SSE4 shouldn't disable AMD SSE4a. This patch restores nosse4. It also adds .sse4a and nosse4a. gas/ * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore nosse4. * doc/c-i386.texi: Document sse4a and nosse4a. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove CPU_ANY_SSE4_FLAGS.		2020-02-16 08:45:34 -08:00
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all.texi
as.texi	ELF: Support the section flag 'o' in .section directive	2020-02-06 18:05:10 -08:00
c-aarch64.texi
c-alpha.texi
c-arc.texi
c-arm.texi	[binutils][arm] arm support for ARMv8.m Custom Datapath Extension	2020-02-10 16:50:14 +00:00
c-avr.texi
c-bfin.texi
c-bpf.texi
c-cr16.texi
c-cris.texi
c-csky.texi
c-d10v.texi
c-d30v.texi
c-epiphany.texi
c-h8300.texi
c-hppa.texi
c-i386.texi	x86: Don't disable SSE4a when disabling SSE4	2020-02-16 08:45:34 -08:00
c-ia64.texi
c-ip2k.texi
c-lm32.texi
c-m32c.texi
c-m32r.texi
c-m68hc11.texi
c-m68k.texi
c-metag.texi
c-microblaze.texi
c-mips.texi
c-mmix.texi
c-msp430.texi
c-mt.texi
c-nds32.texi
c-nios2.texi
c-ns32k.texi
c-or1k.texi
c-pdp11.texi
c-pj.texi
c-ppc.texi
c-pru.texi
c-riscv.texi
c-rl78.texi
c-rx.texi
c-s12z.texi
c-s390.texi
c-score.texi
c-sh.texi
c-sparc.texi
c-tic6x.texi
c-tic54x.texi
c-tilegx.texi
c-tilepro.texi
c-v850.texi
c-vax.texi
c-visium.texi
c-wasm32.texi
c-xc16x.texi
c-xgate.texi
c-xstormy16.texi
c-xtensa.texi
c-z8k.texi
c-z80.texi	Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add DWARF debug info support to the Z80 assembler.	2020-02-07 14:53:46 +00:00
fdl.texi
h8.texi
internals.texi
Makefile.am
Makefile.in