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8b353c47b7
A few tests in the ld testsuite were expecting the disassembler to emit `rett' instructions in V9. This patch updates the tests to expect `return' instead. ld/ChangeLog: 2017-04-24 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/ld-sparc/tlssunbin64.dd: Expect `return' instructions instead of `rett' in V9. * testsuite/ld-sparc/tlssunnopic64.dd: Likewise. * testsuite/ld-sparc/tlssunpic64.dd: Likewise.
89 lines
2.8 KiB
Plaintext
89 lines
2.8 KiB
Plaintext
#source: tlssunnopic64.s
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#source: tlsnopic.s
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#as: --64 -Av9
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#ld: -shared -melf64_sparc
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#objdump: -drj.text
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#target: sparc*-*-*
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.*: +file format elf64-sparc
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Disassembly of section .text:
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0+1000 <fn3>:
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+1000: 9d e3 bf 60 save %sp, -160, %sp
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+1004: 23 00 00 00 sethi %hi\(0\), %l1
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+1008: 25 00 00 00 sethi %hi\(0\), %l2
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+100c: a2 14 60 00 mov %l1, %l1
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+1010: a4 14 a0 00 mov %l2, %l2
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+1014: a3 2c 70 20 sllx %l1, 0x20, %l1
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+1018: a2 04 40 12 add %l1, %l2, %l1
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+101c: 01 00 00 00 nop *
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+1020: 01 00 00 00 nop *
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+1024: 01 00 00 00 nop *
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+1028: 01 00 00 00 nop *
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+102c: 17 00 00 00 sethi %hi\(0\), %o3
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+1030: 96 02 e0 18 add %o3, 0x18, %o3 ! 18 <.*>
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+1034: d4 5c 40 0b ldx \[ %l1 \+ %o3 \], %o2
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+1038: 98 01 c0 0a add %g7, %o2, %o4
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+103c: 01 00 00 00 nop *
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+1040: 01 00 00 00 nop *
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+1044: 01 00 00 00 nop *
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+1048: 01 00 00 00 nop *
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+104c: 11 00 00 00 sethi %hi\(0\), %o0
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+1050: 90 02 20 20 add %o0, 0x20, %o0 ! 20 <.*>
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+1054: d0 5c 40 08 ldx \[ %l1 \+ %o0 \], %o0
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+1058: d0 01 c0 08 ld \[ %g7 \+ %o0 \], %o0
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+105c: 01 00 00 00 nop *
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+1060: 01 00 00 00 nop *
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+1064: 01 00 00 00 nop *
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+1068: 01 00 00 00 nop *
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+106c: 11 00 00 00 sethi %hi\(0\), %o0
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+1070: 90 02 20 28 add %o0, 0x28, %o0 ! 28 <.*>
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+1074: d0 5c 40 08 ldx \[ %l1 \+ %o0 \], %o0
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+1078: 90 01 c0 08 add %g7, %o0, %o0
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+107c: 01 00 00 00 nop *
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+1080: 01 00 00 00 nop *
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+1084: 01 00 00 00 nop *
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+1088: 01 00 00 00 nop *
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+108c: 1b 00 00 00 sethi %hi\(0\), %o5
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+1090: 92 03 60 30 add %o5, 0x30, %o1 ! 30 <.*>
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+1094: d4 5c 40 09 ldx \[ %l1 \+ %o1 \], %o2
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+1098: d6 29 c0 0a stb %o3, \[ %g7 \+ %o2 \]
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+109c: 01 00 00 00 nop *
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+10a0: 01 00 00 00 nop *
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+10a4: 01 00 00 00 nop *
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+10a8: 01 00 00 00 nop *
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+10ac: 11 00 00 00 sethi %hi\(0\), %o0
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+10b0: 90 02 20 08 add %o0, 8, %o0 ! 8 <.*>
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+10b4: d0 5c 40 08 ldx \[ %l1 \+ %o0 \], %o0
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+10b8: 90 01 c0 08 add %g7, %o0, %o0
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+10bc: 01 00 00 00 nop *
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+10c0: 01 00 00 00 nop *
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+10c4: 01 00 00 00 nop *
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+10c8: 01 00 00 00 nop *
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+10cc: 1b 00 00 00 sethi %hi\(0\), %o5
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+10d0: 92 03 60 10 add %o5, 0x10, %o1 ! 10 <.*>
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+10d4: d4 5c 40 09 ldx \[ %l1 \+ %o1 \], %o2
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+10d8: d6 29 c0 0a stb %o3, \[ %g7 \+ %o2 \]
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+10dc: 01 00 00 00 nop *
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+10e0: 01 00 00 00 nop *
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+10e4: 01 00 00 00 nop *
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+10e8: 01 00 00 00 nop *
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+10ec: 15 00 00 00 sethi %hi\(0\), %o2
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+10f0: 98 1a a0 00 xor %o2, 0, %o4
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+10f4: 90 01 c0 0c add %g7, %o4, %o0
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+10f8: 01 00 00 00 nop *
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+10fc: 01 00 00 00 nop *
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+1100: 01 00 00 00 nop *
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+1104: 01 00 00 00 nop *
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+1108: 15 00 00 00 sethi %hi\(0\), %o2
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+110c: 94 1a a0 00 xor %o2, 0, %o2
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+1110: d4 01 c0 0a ld \[ %g7 \+ %o2 \], %o2
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+1114: 01 00 00 00 nop *
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+1118: 01 00 00 00 nop *
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+111c: 01 00 00 00 nop *
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+1120: 01 00 00 00 nop *
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+1124: 81 cf e0 08 return %i7 \+ 8
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+1128: 01 00 00 00 nop *
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#pass
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