Mike Frysinger b830591caf sim: v850: switch to standard (high-level) trace defines ... The v850 port uses -DDEBUG to control whether to enable internal tracing. We already have such options via the common trace framework, and those can be controlled at build time via configure flags (which the v850 code currently cannot). So switch it over to WITH_TRACE_ANY_P to simplify the v850 build code even if it doesn't (yet) respect any other trace options.		2022-11-03 22:21:04 +07:00
..
aclocal.m4	sim: unify reserved instruction bits settings	2021-07-01 20:53:00 -04:00
ChangeLog-2021	sim: rename ChangeLog files to ChangeLog-2021	2021-08-17 20:27:36 -04:00
configure	sim: gdbinit: hoist setup to common code	2022-02-21 13:57:33 -05:00
configure.ac	sim: unify reserved instruction bits settings	2021-07-01 20:53:00 -04:00
interp.c	sim: common: change sim_{fetch,store}_register helpers to use void* buffers	2022-11-02 20:31:10 +05:45
local.mk	Automatic Copyright Year update after running gdb/copyright.py	2022-01-01 19:13:23 +04:00
Makefile.in	sim: v850: switch to standard (high-level) trace defines	2022-11-03 22:21:04 +07:00
sim-main.h	sim: v850: switch to standard (high-level) trace defines	2022-11-03 22:21:04 +07:00
simops.c	sim: v850: switch to standard (high-level) trace defines	2022-11-03 22:21:04 +07:00
simops.h	sim: v850: migrate to standard uintXX_t types	2022-01-06 01:17:37 -05:00
v850_sim.h
v850-dc
v850.igen	sim: v850: migrate to standard uintXX_t types	2022-01-06 01:17:37 -05:00