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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
139 lines
3.8 KiB
Plaintext
139 lines
3.8 KiB
Plaintext
# frv testcase for mcmpsh $FRi,$FRj,$FCCk
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# mach: all
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.include "testutils.inc"
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start
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.global mcmpsh
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mcmpsh:
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set_fr_iimmed 0x7fff,0x7fff,fr10
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set_fr_iimmed 0x7fff,0x7fff,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x8,1
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set_fr_iimmed 0x7fff,0x7fff,fr10
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set_fr_iimmed 0x7fff,0x8000,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0xd,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x2,1
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set_fr_iimmed 0x7fff,0x7fff,fr10
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set_fr_iimmed 0x8000,0x7fff,fr11
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set_fcc 0xd,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x2,0
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test_fcc 0x8,1
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set_fr_iimmed 0x7fff,0x7fff,fr10
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set_fr_iimmed 0x8000,0x8000,fr11
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set_fcc 0xd,0 ; Set mask opposite of expected
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set_fcc 0xd,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x2,0
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test_fcc 0x2,1
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set_fr_iimmed 0x7fff,0x8000,fr10
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set_fr_iimmed 0x7fff,0x7fff,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0xb,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x4,1
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set_fr_iimmed 0x7fff,0x8000,fr10
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set_fr_iimmed 0x7fff,0x8000,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x8,1
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set_fr_iimmed 0x7fff,0x8000,fr10
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set_fr_iimmed 0x8000,0x7fff,fr11
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set_fcc 0xd,0 ; Set mask opposite of expected
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set_fcc 0xb,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x2,0
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test_fcc 0x4,1
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set_fr_iimmed 0x7fff,0x8000,fr10
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set_fr_iimmed 0x8000,0x8000,fr11
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set_fcc 0xd,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x2,0
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test_fcc 0x8,1
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set_fr_iimmed 0x8000,0x7fff,fr10
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set_fr_iimmed 0x7fff,0x7fff,fr11
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set_fcc 0xb,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x4,0
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test_fcc 0x8,1
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set_fr_iimmed 0x8000,0x7fff,fr10
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set_fr_iimmed 0x7fff,0x8000,fr11
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set_fcc 0xb,0 ; Set mask opposite of expected
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set_fcc 0xd,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x4,0
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test_fcc 0x2,1
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set_fr_iimmed 0x8000,0x7fff,fr10
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set_fr_iimmed 0x8000,0x7fff,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x8,1
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set_fr_iimmed 0x8000,0x7fff,fr10
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set_fr_iimmed 0x8000,0x8000,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0xd,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x2,1
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set_fr_iimmed 0x8000,0x8000,fr10
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set_fr_iimmed 0x7fff,0x7fff,fr11
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set_fcc 0xb,0 ; Set mask opposite of expected
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set_fcc 0xb,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x4,0
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test_fcc 0x4,1
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set_fr_iimmed 0x8000,0x8000,fr10
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set_fr_iimmed 0x7fff,0x8000,fr11
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set_fcc 0xb,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x4,0
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test_fcc 0x8,1
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set_fr_iimmed 0x8000,0x8000,fr10
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set_fr_iimmed 0x8000,0x7fff,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0xb,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x4,1
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set_fr_iimmed 0x8000,0x8000,fr10
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set_fr_iimmed 0x8000,0x8000,fr11
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set_fcc 0x7,0 ; Set mask opposite of expected
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set_fcc 0x7,1 ; Set mask opposite of expected
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mcmpsh fr10,fr11,fcc0
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test_fcc 0x8,0
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test_fcc 0x8,1
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pass
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