Mike Frysinger 236bf91feb sim: bfin: avoid stack error under asan ... We set up an array of 3 elements and then index into it with a 2bit value. We check the range before we actually use the pointer, but the indexing is enough to make asan upset, so just stuff a fourth value in there to keep things simple.		2015-12-26 18:22:37 -05:00
..
aarch64	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
arm	sim: arm: delete unused code	2015-12-25 03:09:01 -05:00
avr	Fix invalid left shift of negative value	2015-12-15 14:09:14 +01:00
bfin	sim: bfin: avoid stack error under asan	2015-12-26 18:22:37 -05:00
common	sim: sim-core: pass down cpu to hw accesses when available	2015-12-26 14:22:14 -05:00
cr16	sim: cris: move option install to sim_open	2015-12-24 20:34:07 -05:00
cris	sim: cris: do not pass cpu when writing memory during init	2015-12-26 08:26:28 -05:00
d10v	sim: sim-stop/sim-reason/sim-reg: move to common obj list	2015-11-16 00:41:59 -05:00
erc32
frv	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
ft32	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
h8300	sim: h8300: move h8300-specific options out of common code	2015-12-24 20:11:26 -05:00
igen
iq2000	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
lm32	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
m32c	sim: m32c: move test code to testsuite	2015-11-10 00:19:49 -05:00
m32r	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
m68hc11	sim: make LMA loading the default for all targets	2015-12-24 21:50:17 -05:00
mcore	sim: sim-stop/sim-reason/sim-reg: move to common obj list	2015-11-16 00:41:59 -05:00
microblaze	sim: sim-stop/sim-reason/sim-reg: move to common obj list	2015-11-16 00:41:59 -05:00
mips	sim: mips: delete mmu stubs to move to common sim_{read,write}	2015-12-26 11:50:59 -05:00
mn10300	sim: make LMA loading the default for all targets	2015-12-24 21:50:17 -05:00
moxie	sim: sim-stop/sim-reason/sim-reg: move to common obj list	2015-11-16 00:41:59 -05:00
msp430	Fix invalid left shift of negative value	2015-12-15 14:09:14 +01:00
ppc	sim: ppc: avoid use of $< in ordinary rules [PR sim/13834]	2015-11-22 01:59:20 -05:00
rl78
rx	Update the RX simulator to handle the latest opcode types.	2015-11-10 16:08:35 +00:00
sh	sim: sh: delete global callback/argv	2015-11-22 00:53:23 -05:00
sh64	sim: standardize sim_create_inferior handling of argv a bit more	2015-12-26 07:19:07 -05:00
testsuite	sim: cris: migrate from WITH_DEVICES to WITH_HW	2015-12-25 06:10:03 -05:00
v850	sim: enable watchpoint module everywhere	2015-12-24 20:03:14 -05:00
.gitignore
ChangeLog	sim: aarch64: move ChangeLog content	2015-12-26 07:12:33 -05:00
configure	Add an AArch64 simulator to GDB.	2015-11-24 08:47:59 +00:00
configure.ac
configure.tgt	Add an AArch64 simulator to GDB.	2015-11-24 08:47:59 +00:00
MAINTAINERS
Makefile.in
README-HACKING