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1d506c26d9
This commit is the result of the following actions: - Running gdb/copyright.py to update all of the copyright headers to include 2024, - Manually updating a few files the copyright.py script told me to update, these files had copyright headers embedded within the file, - Regenerating gdbsupport/Makefile.in to refresh it's copyright date, - Using grep to find other files that still mentioned 2023. If these files were updated last year from 2022 to 2023 then I've updated them this year to 2024. I'm sure I've probably missed some dates. Feel free to fix them up as you spot them.
120 lines
4.3 KiB
C
120 lines
4.3 KiB
C
/* OpenRISC simulator support code header
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Copyright (C) 2017-2024 Free Software Foundation, Inc.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef OR1K_SIM_H
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#define OR1K_SIM_H
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#include "symcat.h"
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/* GDB register numbers. */
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#define PPC_REGNUM 32
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#define PC_REGNUM 33
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#define SR_REGNUM 34
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/* Misc. profile data. */
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typedef struct
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{
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} OR1K_MISC_PROFILE;
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/* Nop codes used in nop simulation. */
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#define NOP_NOP 0x0
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#define NOP_EXIT 0x1
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#define NOP_REPORT 0x2
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#define NOP_PUTC 0x4
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#define NOP_CNT_RESET 0x5
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#define NOP_GET_TICKS 0x6
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#define NOP_GET_PS 0x7
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#define NOP_TRACE_ON 0x8
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#define NOP_TRACE_OFF 0x9
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#define NOP_RANDOM 0xa
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#define NOP_OR1KSIM 0xb
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#define NOP_EXIT_SILENT 0xc
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#define NUM_SPR 0x20000
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#define SPR_GROUP_SHIFT 11
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#define SPR_GROUP_FIRST(group) (((UWI) SPR_GROUP_##group) << SPR_GROUP_SHIFT)
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#define SPR_ADDR(group,index) \
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(SPR_GROUP_FIRST(group) | ((UWI) SPR_INDEX_##group##_##index))
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/* Define word getters and setter helpers based on those from
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sim/common/cgen-mem.h. */
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#define GETTWI GETTSI
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#define SETTWI SETTSI
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void or1k_cpu_init (SIM_DESC sd, sim_cpu *current_cpu, const USI or1k_vr,
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const USI or1k_upr, const USI or1k_cpucfgr);
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void or1k32bf_insn_before (sim_cpu* current_cpu, SEM_PC vpc, const IDESC *idesc);
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void or1k32bf_insn_after (sim_cpu* current_cpu, SEM_PC vpc, const IDESC *idesc);
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void or1k32bf_fpu_error (CGEN_FPU* fpu, int status);
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void or1k32bf_exception (sim_cpu *current_cpu, USI pc, USI exnum);
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void or1k32bf_rfe (sim_cpu *current_cpu);
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void or1k32bf_nop (sim_cpu *current_cpu, USI uimm16);
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USI or1k32bf_mfspr (sim_cpu *current_cpu, USI addr);
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void or1k32bf_mtspr (sim_cpu *current_cpu, USI addr, USI val);
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int or1k32bf_fetch_register (sim_cpu *current_cpu, int rn, void *buf, int len);
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int or1k32bf_store_register (sim_cpu *current_cpu, int rn, const void *buf,
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int len);
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int or1k32bf_model_or1200_u_exec (sim_cpu *current_cpu, const IDESC *idesc,
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int unit_num, int referenced);
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int or1k32bf_model_or1200nd_u_exec (sim_cpu *current_cpu, const IDESC *idesc,
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int unit_num, int referenced);
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void or1k32bf_model_insn_before (sim_cpu *current_cpu, int first_p);
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void or1k32bf_model_insn_after (sim_cpu *current_cpu, int last_p, int cycles);
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USI or1k32bf_h_spr_get_raw (sim_cpu *current_cpu, USI addr);
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void or1k32bf_h_spr_set_raw (sim_cpu *current_cpu, USI addr, USI val);
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USI or1k32bf_h_spr_field_get_raw (sim_cpu *current_cpu, USI addr, int msb,
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int lsb);
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void or1k32bf_h_spr_field_set_raw (sim_cpu *current_cpu, USI addr, int msb,
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int lsb, USI val);
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USI or1k32bf_make_load_store_addr (sim_cpu *current_cpu, USI base, SI offset,
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int size);
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USI or1k32bf_ff1 (sim_cpu *current_cpu, USI val);
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USI or1k32bf_fl1 (sim_cpu *current_cpu, USI val);
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#define OR1K_DEFAULT_MEM_SIZE 0x800000 /* 8M */
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struct or1k_sim_cpu
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{
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OR1K_MISC_PROFILE or1k_misc_profile;
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#define CPU_OR1K_MISC_PROFILE(cpu) (& OR1K_SIM_CPU (cpu)->or1k_misc_profile)
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/* CPU specific parts go here.
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Note that in files that don't need to access these pieces WANT_CPU_FOO
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won't be defined and thus these parts won't appear. This is ok in the
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sense that things work. It is a source of bugs though.
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One has to of course be careful to not take the size of this
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struct and no structure members accessed in non-cpu specific files can
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go after here. Oh for a better language. */
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UWI spr[NUM_SPR];
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/* Next instruction will be in delay slot. */
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BI next_delay_slot;
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/* Currently in delay slot. */
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BI delay_slot;
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#ifdef WANT_CPU_OR1K32BF
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OR1K32BF_CPU_DATA cpu_data;
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#endif
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};
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#define OR1K_SIM_CPU(cpu) ((struct or1k_sim_cpu *) CPU_ARCH_DATA (cpu))
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#endif /* OR1K_SIM_H */
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