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https://sourceware.org/git/binutils-gdb.git
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08106042d9
I built GDB for all targets on a x86-64/GNU-Linux system, and
then (accidentally) passed GDB a RISC-V binary, and asked GDB to "run"
the binary on the native target. I got this error:
(gdb) show architecture
The target architecture is set to "auto" (currently "i386").
(gdb) file /tmp/hello.rv32.exe
Reading symbols from /tmp/hello.rv32.exe...
(gdb) show architecture
The target architecture is set to "auto" (currently "riscv:rv32").
(gdb) run
Starting program: /tmp/hello.rv32.exe
../../src/gdb/i387-tdep.c:596: internal-error: i387_supply_fxsave: Assertion `tdep->st0_regnum >= I386_ST0_REGNUM' failed.
What's going on here is this; initially the architecture is i386, this
is based on the default architecture, which is set based on the native
target. After loading the RISC-V executable the architecture of the
current inferior is updated based on the architecture of the
executable.
When we "run", GDB does a fork & exec, with the inferior being
controlled through ptrace. GDB sees an initial stop from the inferior
as soon as the inferior comes to life. In response to this stop GDB
ends up calling save_stop_reason (linux-nat.c), which ends up trying
to read register from the inferior, to do this we end up calling
target_ops::fetch_registers, which, for the x86-64 native target,
calls amd64_linux_nat_target::fetch_registers.
After this I eventually end up in i387_supply_fxsave, different x86
based targets will end in different functions to fetch registers, but
it doesn't really matter which function we end up in, the problem is
this line, which is repeated in many places:
i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
The problem here is that the ARCH in this line comes from the current
inferior, which, as we discussed above, will be a RISC-V gdbarch, the
tdep field will actually be of type riscv_gdbarch_tdep, not
i386_gdbarch_tdep. After this cast we are relying on undefined
behaviour, in my case I happen to trigger an assert, but this might
not always be the case.
The thing I tried that exposed this problem was of course, trying to
start an executable of the wrong architecture on a native target. I
don't think that the correct solution for this problem is to detect,
at the point of cast, that the gdbarch_tdep object is of the wrong
type, but, I did wonder, is there a way that we could protect
ourselves from incorrectly casting the gdbarch_tdep object?
I think that there is something we can do here, and this commit is the
first step in that direction, though no actual check is added by this
commit.
This commit can be split into two parts:
(1) In gdbarch.h and arch-utils.c. In these files I have modified
gdbarch_tdep (the function) so that it now takes a template argument,
like this:
template<typename TDepType>
static inline TDepType *
gdbarch_tdep (struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep_1 (gdbarch);
return static_cast<TDepType *> (tdep);
}
After this change we are no better protected, but the cast is now
done within the gdbarch_tdep function rather than at the call sites,
this leads to the second, much larger change in this commit,
(2) Everywhere gdbarch_tdep is called, we make changes like this:
- i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
+ i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
There should be no functional change after this commit.
In the next commit I will build on this change to add an assertion in
gdbarch_tdep that checks we are casting to the correct type.
354 lines
10 KiB
C
354 lines
10 KiB
C
/* Native-dependent code for FreeBSD/amd64.
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Copyright (C) 2003-2022 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <signal.h>
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <sys/sysctl.h>
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#include <sys/user.h>
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#include <machine/reg.h>
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#include "amd64-tdep.h"
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#include "amd64-fbsd-tdep.h"
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#include "amd64-nat.h"
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#include "x86-nat.h"
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#include "gdbsupport/x86-xstate.h"
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#include "x86-fbsd-nat.h"
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class amd64_fbsd_nat_target final : public x86_fbsd_nat_target
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{
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public:
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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const struct target_desc *read_description () override;
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};
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static amd64_fbsd_nat_target the_amd64_fbsd_nat_target;
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#ifdef PT_GETXSTATE_INFO
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static size_t xsave_len;
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#endif
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/* This is a layout of the amd64 'struct reg' but with i386
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registers. */
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static const struct regcache_map_entry amd64_fbsd32_gregmap[] =
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{
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{ 8, REGCACHE_MAP_SKIP, 8 },
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{ 1, I386_EDI_REGNUM, 8 },
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{ 1, I386_ESI_REGNUM, 8 },
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{ 1, I386_EBP_REGNUM, 8 },
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{ 1, I386_EBX_REGNUM, 8 },
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{ 1, I386_EDX_REGNUM, 8 },
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{ 1, I386_ECX_REGNUM, 8 },
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{ 1, I386_EAX_REGNUM, 8 },
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* trapno */
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{ 1, I386_FS_REGNUM, 2 },
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{ 1, I386_GS_REGNUM, 2 },
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* err */
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{ 1, I386_ES_REGNUM, 2 },
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{ 1, I386_DS_REGNUM, 2 },
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{ 1, I386_EIP_REGNUM, 8 },
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{ 1, I386_CS_REGNUM, 8 },
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{ 1, I386_EFLAGS_REGNUM, 8 },
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{ 1, I386_ESP_REGNUM, 0 },
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{ 1, I386_SS_REGNUM, 8 },
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{ 0 }
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};
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static const struct regset amd64_fbsd32_gregset =
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{
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amd64_fbsd32_gregmap, regcache_supply_regset, regcache_collect_regset
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};
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/* Return the regset to use for 'struct reg' for the GDBARCH. */
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static const struct regset *
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find_gregset (struct gdbarch *gdbarch)
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{
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if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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return &amd64_fbsd32_gregset;
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else
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return &amd64_fbsd_gregset;
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}
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/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
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for all registers. */
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void
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amd64_fbsd_nat_target::fetch_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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#if defined(PT_GETFSBASE) || defined(PT_GETGSBASE)
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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#endif
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pid_t pid = get_ptrace_pid (regcache->ptid ());
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const struct regset *gregset = find_gregset (gdbarch);
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if (fetch_register_set<struct reg> (regcache, regnum, PT_GETREGS, gregset))
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{
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if (regnum != -1)
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return;
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}
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#ifdef PT_GETFSBASE
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if (regnum == -1 || regnum == tdep->fsbase_regnum)
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{
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register_t base;
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if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't get segment register fs_base"));
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regcache->raw_supply (tdep->fsbase_regnum, &base);
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if (regnum != -1)
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return;
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}
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#endif
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#ifdef PT_GETGSBASE
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if (regnum == -1 || regnum == tdep->fsbase_regnum + 1)
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{
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register_t base;
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if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't get segment register gs_base"));
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regcache->raw_supply (tdep->fsbase_regnum + 1, &base);
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if (regnum != -1)
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return;
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}
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#endif
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/* There is no amd64_fxsave_supplies or amd64_xsave_supplies.
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Instead, the earlier register sets return early if the request
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was for a specific register that was already satisified to avoid
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fetching the FPU/XSAVE state unnecessarily. */
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#ifdef PT_GETXSTATE_INFO
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if (xsave_len != 0)
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{
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void *xstateregs = alloca (xsave_len);
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if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1)
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perror_with_name (_("Couldn't get extended state status"));
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amd64_supply_xsave (regcache, regnum, xstateregs);
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return;
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}
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#endif
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struct fpreg fpregs;
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if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't get floating point status"));
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amd64_supply_fxsave (regcache, regnum, &fpregs);
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}
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/* Store register REGNUM back into the inferior. If REGNUM is -1, do
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this for all registers. */
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void
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amd64_fbsd_nat_target::store_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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#if defined(PT_GETFSBASE) || defined(PT_GETGSBASE)
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const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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#endif
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pid_t pid = get_ptrace_pid (regcache->ptid ());
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const struct regset *gregset = find_gregset (gdbarch);
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if (store_register_set<struct reg> (regcache, regnum, PT_GETREGS, PT_SETREGS,
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gregset))
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{
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if (regnum != -1)
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return;
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}
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#ifdef PT_SETFSBASE
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if (regnum == -1 || regnum == tdep->fsbase_regnum)
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{
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register_t base;
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/* Clear the full base value to support 32-bit targets. */
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base = 0;
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regcache->raw_collect (tdep->fsbase_regnum, &base);
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if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't write segment register fs_base"));
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if (regnum != -1)
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return;
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}
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#endif
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#ifdef PT_SETGSBASE
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if (regnum == -1 || regnum == tdep->fsbase_regnum + 1)
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{
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register_t base;
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/* Clear the full base value to support 32-bit targets. */
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base = 0;
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regcache->raw_collect (tdep->fsbase_regnum + 1, &base);
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if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't write segment register gs_base"));
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if (regnum != -1)
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return;
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}
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#endif
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/* There is no amd64_fxsave_supplies or amd64_xsave_supplies.
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Instead, the earlier register sets return early if the request
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was for a specific register that was already satisified to avoid
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fetching the FPU/XSAVE state unnecessarily. */
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#ifdef PT_GETXSTATE_INFO
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if (xsave_len != 0)
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{
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void *xstateregs = alloca (xsave_len);
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if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1)
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perror_with_name (_("Couldn't get extended state status"));
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amd64_collect_xsave (regcache, regnum, xstateregs, 0);
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if (ptrace (PT_SETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs,
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xsave_len) == -1)
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perror_with_name (_("Couldn't write extended state status"));
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return;
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}
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#endif
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struct fpreg fpregs;
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if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't get floating point status"));
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amd64_collect_fxsave (regcache, regnum, &fpregs);
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if (ptrace (PT_SETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't write floating point status"));
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}
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/* Support for debugging kernel virtual memory images. */
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#include <machine/pcb.h>
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#include <osreldate.h>
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#include "bsd-kvm.h"
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static int
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amd64fbsd_supply_pcb (struct regcache *regcache, struct pcb *pcb)
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{
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/* The following is true for FreeBSD 5.2:
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The pcb contains %rip, %rbx, %rsp, %rbp, %r12, %r13, %r14, %r15,
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%ds, %es, %fs and %gs. This accounts for all callee-saved
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registers specified by the psABI and then some. Here %esp
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contains the stack pointer at the point just after the call to
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cpu_switch(). From this information we reconstruct the register
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state as it would like when we just returned from cpu_switch(). */
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/* The stack pointer shouldn't be zero. */
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if (pcb->pcb_rsp == 0)
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return 0;
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pcb->pcb_rsp += 8;
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regcache->raw_supply (AMD64_RIP_REGNUM, &pcb->pcb_rip);
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regcache->raw_supply (AMD64_RBX_REGNUM, &pcb->pcb_rbx);
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regcache->raw_supply (AMD64_RSP_REGNUM, &pcb->pcb_rsp);
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regcache->raw_supply (AMD64_RBP_REGNUM, &pcb->pcb_rbp);
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regcache->raw_supply (12, &pcb->pcb_r12);
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regcache->raw_supply (13, &pcb->pcb_r13);
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regcache->raw_supply (14, &pcb->pcb_r14);
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regcache->raw_supply (15, &pcb->pcb_r15);
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#if (__FreeBSD_version < 800075) && (__FreeBSD_kernel_version < 800075)
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/* struct pcb provides the pcb_ds/pcb_es/pcb_fs/pcb_gs fields only
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up until __FreeBSD_version 800074: The removal of these fields
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occurred on 2009-04-01 while the __FreeBSD_version number was
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bumped to 800075 on 2009-04-06. So 800075 is the closest version
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number where we should not try to access these fields. */
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regcache->raw_supply (AMD64_DS_REGNUM, &pcb->pcb_ds);
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regcache->raw_supply (AMD64_ES_REGNUM, &pcb->pcb_es);
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regcache->raw_supply (AMD64_FS_REGNUM, &pcb->pcb_fs);
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regcache->raw_supply (AMD64_GS_REGNUM, &pcb->pcb_gs);
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#endif
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return 1;
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}
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/* Implement the read_description method. */
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const struct target_desc *
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amd64_fbsd_nat_target::read_description ()
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{
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#ifdef PT_GETXSTATE_INFO
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static int xsave_probed;
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static uint64_t xcr0;
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#endif
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struct reg regs;
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int is64;
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if (ptrace (PT_GETREGS, inferior_ptid.pid (),
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(PTRACE_TYPE_ARG3) ®s, 0) == -1)
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perror_with_name (_("Couldn't get registers"));
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is64 = (regs.r_cs == GSEL (GUCODE_SEL, SEL_UPL));
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#ifdef PT_GETXSTATE_INFO
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if (!xsave_probed)
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{
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struct ptrace_xstate_info info;
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if (ptrace (PT_GETXSTATE_INFO, inferior_ptid.pid (),
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(PTRACE_TYPE_ARG3) &info, sizeof (info)) == 0)
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{
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xsave_len = info.xsave_len;
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xcr0 = info.xsave_mask;
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}
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xsave_probed = 1;
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}
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if (xsave_len != 0)
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{
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if (is64)
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return amd64_target_description (xcr0, true);
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else
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return i386_target_description (xcr0, true);
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}
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#endif
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if (is64)
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return amd64_target_description (X86_XSTATE_SSE_MASK, true);
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else
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return i386_target_description (X86_XSTATE_SSE_MASK, true);
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}
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void _initialize_amd64fbsd_nat ();
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void
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_initialize_amd64fbsd_nat ()
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{
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add_inf_child_target (&the_amd64_fbsd_nat_target);
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/* Support debugging kernel virtual memory images. */
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bsd_kvm_add_target (amd64fbsd_supply_pcb);
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}
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