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https://sourceware.org/git/binutils-gdb.git
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c20c30f615
This is -fpie -pie generating dynamic relocations in the text section, simply because no TLS transitions are applied in PIE mode. The meat of the patch is to turn calls to bfd_link_pic (info) in TLS-related code into !bfd_link_executable (info) and there are quite a lot of them... bfd/ * elfxx-sparc.c (sparc_elf_tls_transition): Turn call to bfd_link_pic into call to !bfd_link_executable and tidy up. (_bfd_sparc_elf_check_relocs): Fix formatting and tidy up. <R_SPARC_TLS_LE_HIX22>: Turn call to bfd_link_pic into call to !bfd_link_executable. <R_SPARC_TLS_IE_HI22>: Likewise. <GOT relocations>: Remove useless code, tidy and merge blocks. <R_SPARC_TLS_GD_CALL>: Turn call to bfd_link_pic into call to !bfd_link_executable. <R_SPARC_WPLT30>: Tidy up. (_bfd_sparc_elf_gc_mark_hook): Turn call to bfd_link_pic into call to !bfd_link_executable. (allocate_dynrelocs): Likewise. (_bfd_sparc_elf_relocate_section): Fix formatting and tidy up. <R_SPARC_TLS_GD_HI22>: Merge into... <R_SPARC_TLS_GD_LO10>: ...this. Adjust 4th argument in call to sparc_elf_tls_transition and remove redundant code. <R_SPARC_TLS_LDM_HI22>: Turn call to bfd_link_pic into call to !bfd_link_executable. <R_SPARC_TLS_LDO_HIX22>: Likewise. <R_SPARC_TLS_LE_HIX22>: Likewise. Tidy up. <R_SPARC_TLS_LDM_CALL>: Likewise. <R_SPARC_TLS_GD_CALL>: Likewise. Tidy up. <R_SPARC_TLS_GD_ADD>: Likewise. <R_SPARC_TLS_LDM_ADD>: Likewise. <R_SPARC_TLS_LDO_ADD>: Likewise. <R_SPARC_TLS_IE_LD>: Likewise. ld/ * testsuite/ld-elf/tls.exp (AFLAGS_PIC): Define on SPARC. (pr22263-1): Pass AFLAGS_PIC to the assembler. * testsuite/ld-sparc/tlspie32.s: Add test for other 3 transitions. * testsuite/ld-sparc/tlspie32.dd: Adjust to above. * testsuite/ld-sparc/tlspie64.s: Add test for other 3 transitions. * testsuite/ld-sparc/tlspie64.dd: Adjust to above.
66 lines
2.0 KiB
Plaintext
66 lines
2.0 KiB
Plaintext
#source: tlspie32.s
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#source: tlspic.s
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#as: --32 -K PIC
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#ld: -shared -melf32_sparc
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#objdump: -drj.text
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#target: sparc*-*-*
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.*: +file format elf32-sparc
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Disassembly of section .text:
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0[0-9a-f]+ <foo-0x8>:
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+[0-9a-f]+: 81 c3 e0 08 retl
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+[0-9a-f]+: ae 03 c0 17 add %o7, %l7, %l7
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0[0-9a-f]+ <foo>:
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+[0-9a-f]+: 9d e3 bf 98 save %sp, -104, %sp
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+[0-9a-f]+: 2f 00 00 40 sethi %hi\(0x10000\), %l7
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+[0-9a-f]+: 7f ff ff fc call [0-9a-f]+ <.*>
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+[0-9a-f]+: ae 05 e1 60 add %l7, 0x160, %l7 ! 10160 <.*>
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 03 00 00 00 sethi %hi\(0\), %g1
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+[0-9a-f]+: 82 00 60 04 add %g1, 4, %g1 ! 4 <.*>
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+[0-9a-f]+: d0 05 c0 01 ld \[ %l7 \+ %g1 ], %o0
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 90 01 c0 08 add %g7, %o0, %o0
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 03 00 00 00 sethi %hi\(0\), %g1
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+[0-9a-f]+: 82 18 7f f4 xor %g1, -12, %g1
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+[0-9a-f]+: 90 01 c0 01 add %g7, %g1, %o0
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 90 10 00 00 mov %g0, %o0
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 03 00 00 00 sethi %hi\(0\), %g1
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+[0-9a-f]+: 82 18 7f f8 xor %g1, -8, %g1
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+[0-9a-f]+: 82 01 c0 01 add %g7, %g1, %g1
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 03 00 00 00 sethi %hi\(0\), %g1
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+[0-9a-f]+: 82 18 7f fc xor %g1, -4, %g1
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 82 01 c0 01 add %g7, %g1, %g1
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 01 00 00 00 nop
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+[0-9a-f]+: 81 c7 e0 08 ret
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+[0-9a-f]+: 81 e8 00 00 restore
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