mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
6927f98292
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
73 lines
2.5 KiB
Makefile
73 lines
2.5 KiB
Makefile
#source: far-hc11.s
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#as: -m68hc11
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#ld: -m m68hc11elf
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#objdump: -d --prefix-addresses -r
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.*: file format elf32-m68hc11
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Disassembly of section .text:
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0+8000 <tramp._far_foo> pshb
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0+8001 <tramp._far_foo\+0x1> ldab \#0x0
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0+8003 <tramp._far_foo\+0x3> ldy \#0x0+8072 <_far_foo>
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0+8007 <tramp._far_foo\+0x7> jmp 0x0+8056 <__far_trampoline>
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0+800a <tramp._far_bar> pshb
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0+800b <tramp._far_bar\+0x1> ldab \#0x0
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0+800d <tramp._far_bar\+0x3> ldy \#0x0+806a .*
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0+8011 <tramp._far_bar\+0x7> jmp 0x0+8056 <__far_trampoline>
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0+8014 <_start> lds \#0x0+64 <stack>
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0+8017 <_start\+0x3> ldx \#0x0+abcd .*
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0+801a <_start\+0x6> pshx
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0+801b <_start\+0x7> ldd \#0x0+1234 .*
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0+801e <_start\+0xa> ldx \#0x0+5678 .*
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0+8021 <_start\+0xd> jsr 0x0+800a <tramp._far_bar>
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0+8024 <_start\+0x10> cpx \#0x0+1234 .*
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0+8027 <_start\+0x13> bne 0x0+804e <fail>
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0+8029 <_start\+0x15> cpd \#0x0+5678 .*
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0+802d <_start\+0x19> bne 0x0+804e <fail>
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0+802f <_start\+0x1b> pulx
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0+8030 <_start\+0x1c> cpx \#0x0+abcd .*
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0+8033 <_start\+0x1f> bne 0x0+804e <fail>
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0+8035 <_start\+0x21> ldd \#0x0+8000 <tramp._far_foo>
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0+8038 <_start\+0x24> xgdx
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0+8039 <_start\+0x25> jsr 0x0,x
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0+803b <_start\+0x27> ldd \#0x0+800a <tramp._far_bar>
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0+803e <_start\+0x2a> xgdy
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0+8040 <_start\+0x2c> jsr 0x0,y
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0+8043 <_start\+0x2f> ldaa \#0x0
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0+8045 <_start\+0x31> ldy \#0x0+8079 <_far_no_tramp>
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0+8049 <_start\+0x35> bsr 0x0+8066 <__call_a16>
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0+804b <_start\+0x37> clra
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0+804c <_start\+0x38> clrb
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0+804d <_start\+0x39> wai
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0+804e <fail> ldd \#0x0+1 <__bss_size\+0x1>
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0+8051 <fail\+0x3> wai
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0+8052 <fail\+0x4> bra 0x0+8014 <_start>
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0+8054 <__return> ins
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0+8055 <__return\+0x1> rts
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0+8056 <__far_trampoline> psha
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0+8057 <__far_trampoline\+0x1> psha
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0+8058 <__far_trampoline\+0x2> pshx
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0+8059 <__far_trampoline\+0x3> tsx
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0+805a <__far_trampoline\+0x4> ldab 0x4,x
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0+805c <__far_trampoline\+0x6> ldaa 0x2,x
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0+805e <__far_trampoline\+0x8> staa 0x4,x
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0+8060 <__far_trampoline\+0xa> pulx
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0+8061 <__far_trampoline\+0xb> pula
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0+8062 <__far_trampoline\+0xc> pula
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0+8063 <__far_trampoline\+0xd> jmp 0x0,y
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0+8066 <__call_a16> psha
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0+8067 <__call_a16\+0x1> jmp 0x0,y
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Disassembly of section .bank1:
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0+806a <_far_bar> jsr 0x0+8071 <local_bank1>
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0+806d <_far_bar\+0x3> xgdx
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0+806e <_far_bar\+0x4> jmp 0x0+8054 <__return>
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0+8071 <local_bank1> rts
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Disassembly of section .bank2:
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0+8072 <_far_foo> jsr 0x0+8078 <local_bank2>
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0+8075 <_far_foo\+0x3> jmp 0x0+8054 <__return>
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0+8078 <local_bank2> rts
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Disassembly of section .bank3:
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0+8079 <_far_no_tramp> jsr 0x0+807f <local_bank3>
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0+807c <_far_no_tramp\+0x3> jmp 0x0+8054 <__return>
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0+807f <local_bank3> rts
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