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https://sourceware.org/git/binutils-gdb.git
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6927f98292
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
32 lines
1.3 KiB
Makefile
32 lines
1.3 KiB
Makefile
#source: adj-brset.s
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#as: -m68hc11
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#ld: -m m68hc11elf --relax
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#objdump: -d --prefix-addresses -r
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.*: +file format elf32\-m68hc11
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Disassembly of section .text:
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0+8000 <_start> brclr 0x8c,x, #0xc8, 0x0+804a <L8>
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0+8004 <L1> addd \*0x0+4 <_toto>
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0+8006 <L1\+0x2> brclr 0x14,x, \#0x03, 0x0+8004 <L1>
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0+800a <L1\+0x6> brclr 0x5a,x, \#0x63, 0x0+801a <L3>
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0+800e <L2> addd \*0x0+4 <_toto>
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0+8010 <L2\+0x2> brclr 0x13,y, \#0x04, 0x0+800e <L2>
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0+8015 <L2\+0x7> brclr 0x5b,y, \#0x62, 0x0+8024 <L4>
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0+801a <L3> addd \*0x0+4 <_toto>
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0+801c <L3\+0x2> brset 0x12,x, \#0x05, 0x0+801a <L3>
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0+8020 <L3\+0x6> brset 0x5c,x, \#0x61, 0x0+8030 <L5>
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0+8024 <L4> addd \*0x0+4 <_toto>
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0+8026 <L4\+0x2> brset 0x11,y, \#0x06, 0x0+8024 <L4>
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0+802b <L4\+0x7> brset 0x5d,y, \#0x60, 0x0+8030 <L5>
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0+8030 <L5> addd \*0x0+4 <_toto>
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0+8032 <L5\+0x2> brset \*0x0+32 <_table>, \#0x07, 0x0+8030 <L5>
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0+8036 <L5\+0x6> brset \*0x0+3c <_table\+0xa>, \#0x5f, 0x0+8044 <L7>
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0+803a <L6> addd \*0x0+4 <_toto>
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0+803c <L6\+0x2> brclr \*0x0+33 <_table\+0x1>, \#0x08, 0x0+803a <L6>
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0+8040 <L6\+0x6> brset \*0x0+3d <_table\+0xb>, \#0x5e, 0x0+804a <L8>
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0+8044 <L7> addd \*0x0+4 <_toto>
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0+8046 <L7\+0x2> brclr \*0x0+33 <_table\+0x1>, \#0x08, 0x0+803a <L6>
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0+804a <L8> brclr 0x8c,x, \#0xc8, 0x0+8000 <_start>
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0+804e <L8\+0x4> rts
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