binutils-gdb/include/opcode
Przemyslaw Wirkus af1bd771fc aarch64: Extract Pointer Authentication feature from Armv8.3-A
Extract PAC (Pointer Authentication) feature from Armv8.3-A.
Please note that PAC stays a Armv8.3-A feature but now can be
assigned to other architectures or CPUs.
2020-11-06 13:14:14 +00:00
..
aarch64.h aarch64: Extract Pointer Authentication feature from Armv8.3-A 2020-11-06 13:14:14 +00:00
alpha.h
arc-attrs.h
arc-func.h
arc.h
arm.h Fix the ARM assembler to generate a Realtime profile for armv8-r. 2020-05-19 12:45:42 +01:00
avr.h
bfin.h
cgen.h opcodes: discriminate endianness and insn-endianness in CGEN ports 2020-06-04 16:17:42 +02:00
ChangeLog-0415
ChangeLog-9103
convex.h
cr16.h
cris.h
crx.h
csky.h CSKY: Add version flag in eflag and fix bug in disassembling register. 2020-10-26 16:20:10 +08:00
d10v.h
d30v.h
dlx.h
ft32.h
h8300.h
hppa.h
i386.h
ia64.h
m68hc11.h
m68k.h
metag.h
mips.h
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430-decode.h
msp430.h
nds32.h
nfp.h
nios2.h
nios2r1.h
nios2r2.h
np1.h
ns32k.h
pdp11.h
pj.h
pn.h
ppc.h Power10 Reduced precision outer product operations 2020-05-11 21:08:37 +09:30
pru.h
pyr.h
riscv-opc.h RISC-V: Support debug and float CSR as the unprivileged ones. 2020-06-30 09:54:55 +08:00
riscv.h PR26493 UBSAN: elfnn-riscv.c left shift of negative value 2020-08-31 20:28:10 +09:30
rl78.h
rx.h
s12z.h
s390.h
score-datadep.h
score-inst.h
sparc.h
spu-insns.h
spu.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tilegx.h
tilepro.h PR26044, Some targets can't be compiled with GCC 10 (tilepro) 2020-05-28 21:11:51 +09:30
v850.h ubsan: v850-opc.c:412 left shift cannot be represented 2020-09-02 16:30:44 +09:30
vax.h
visium.h
wasm.h
xgate.h