Igor Tsimbalist ee6872beb1 Enable Intel AVX512_BITALG instructions. ... Intel has disclosed a set of new instructions. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf gas/ * config/tc-i386.c (cpu_arch): Add .avx512_bitalg. (cpu_noarch): noavx512_bitalg. * doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg. * testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests. * testsuite/gas/i386/avx512f_bitalg-intel.d: New test. * testsuite/gas/i386/avx512f_bitalg.d: Likewise. * testsuite/gas/i386/avx512f_bitalg.s: Likewise. * testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise. * testsuite/gas/i386/avx512vl_bitalg.d: Likewise. * testsuite/gas/i386/avx512vl_bitalg.s: Likewise. * testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise. * testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise. * testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise. * testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise. * testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise. * testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise. opcodes/ * i386-dis.c (enum): Add PREFIX_EVEX_0F3854, PREFIX_EVEX_0F388F. (enum): Add EVEX_W_0F3854_P_2. * i386-dis-evex.h (evex_table): Updated. * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BITALG, CPU_ANY_AVX512_BITALG_FLAGS. Update CPU_ANY_AVX512F_FLAGS. (cpu_flags): Add CpuAVX512_BITALG. * i386-opc.h (enum): Add CpuAVX512_BITALG. (i386_cpu_flags): Add cpuavx512_bitalg.. * i386-opc.tbl: Add Intel AVX512_BITALG instructions. * i386-init.h: Regenerate. * i386-tbl.h: Likewise.		2017-10-23 15:58:18 +03:00
..
all.texi
as.texinfo	Improve handling of REPT pseudo op with a negative count.	2017-10-20 11:45:19 +01:00
c-aarch64.texi	[Patch AArch64] Turn lr, fp, ip0 and ip1 into proper aliases	2017-08-15 13:58:01 +01:00
c-alpha.texi
c-arc.texi
c-arm.texi	[ARM] Add support for Cortex-A55 and Cortex-A75.	2017-07-05 12:04:37 +01:00
c-avr.texi	Update assembler documentation on some AVR cores.	2017-07-17 10:23:28 +01:00
c-bfin.texi
c-cr16.texi
c-cris.texi
c-d10v.texi
c-d30v.texi
c-epiphany.texi
c-h8300.texi
c-hppa.texi
c-i370.texi
c-i386.texi	Enable Intel AVX512_BITALG instructions.	2017-10-23 15:58:18 +03:00
c-i860.texi
c-i960.texi
c-ia64.texi
c-ip2k.texi
c-lm32.texi
c-m32c.texi
c-m32r.texi
c-m68hc11.texi
c-m68k.texi
c-metag.texi
c-microblaze.texi
c-mips.texi	MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support	2017-06-28 02:07:36 +01:00
c-mmix.texi
c-msp430.texi	Improve MSP430 section placement.	2017-08-29 17:18:43 +01:00
c-mt.texi
c-nds32.texi
c-nios2.texi
c-ns32k.texi
c-pdp11.texi
c-pj.texi
c-ppc.texi	[PowerPC VLE] Add SPE2 and EFS2 instructions support	2017-08-24 17:30:31 +09:30
c-pru.texi
c-riscv.texi
c-rl78.texi
c-rx.texi
c-s390.texi	S/390: Support z14 as CPU name.	2017-07-21 10:54:06 +02:00
c-score.texi
c-sh64.texi
c-sh.texi
c-sparc.texi	binutils: support for the SPARC M8 processor	2017-05-19 09:27:08 -07:00
c-tic6x.texi
c-tic54x.texi
c-tilegx.texi
c-tilepro.texi
c-v850.texi
c-vax.texi
c-visium.texi
c-wasm32.texi
c-xc16x.texi
c-xgate.texi
c-xstormy16.texi
c-xtensa.texi
c-z8k.texi
c-z80.texi
fdl.texi
h8.texi
internals.texi
Makefile.am
Makefile.in