binutils-gdb/include/opcode
Terry Guo a715796ba1 Support ARM Cortex-M7
include/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
	(FPU_VFP_V5D16): Likewise.
	(FPU_VFP_V5_SP_D16): Likewise.
	(FPU_ARCH_VFP_V5D16): Likewise.
	(FPU_ARCH_VFP_V5_SP_D16): Likewise.

bfd/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5.

binutils/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.

gas/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
	(arm_cpus): Support cortex-m7.
	(arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
	(do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
	register only target like FPv5-SP-D16.
	(do_neon_cvttb_1): Likewise.
	(do_vfp_nsyn_fpv8): Likewise.
	(do_vrint_1): Likewise.
	(aeabi_set_public_attributes): Set proper FP arch for FPv5.
	* doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.

gas/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* gas/arm/armv7e-m+fpv5-d16.s: New.
	* gas/arm/armv7e-m+fpv5-d16.d: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.

ld/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* ld-arm/attr-merge-vfp-4-sp.s: New test source file.
	* ld-arm/attr-merge-vfp-5-sp.s: Likewise.
	* ld-arm/attr-merge-vfp-5.s: Likewise.
	* ld-arm/attr-merge-vfp-8.d: New test.
	* ld-arm/attr-merge-vfp-8r.d: Likewise.
	* ld-arm/attr-merge-vfp-9.d: Likewise.
	* ld-arm/attr-merge-vfp-9r.d: Likewise.
	* ld-arm/attr-merge-vfp-10.d: Likewise.
	* ld-arm/attr-merge-vfp-10r.d: Likewise.
	* ld-arm/attr-merge-vfp-11.d: Likewise.
	* ld-arm/attr-merge-vfp-11r.d: Likewise.
	* ld-arm/attr-merge-vfp-12.d: Likewise.
	* ld-arm/attr-merge-vfp-12r.d: Likewise.
	* ld-arm/attr-merge-vfp-13.d: Likewise.
	* ld-arm/attr-merge-vfp-13r.d: Likewise.
	* ld-arm/attr-merge-vfp-14.d: Likewise.
	* ld-arm/attr-merge-vfp-14r.d: Likewise.
	* ld-arm/arm-elf.exp: Run the new tests.
2014-11-21 11:36:06 +08:00
..
aarch64.h [PATCH/AArch64] Implement LSE feature 2014-09-03 14:53:53 +01:00
alpha.h
arc.h
arm.h Support ARM Cortex-M7 2014-11-21 11:36:06 +08:00
avr.h
bfin.h
cgen.h
ChangeLog Add mach parameter to nios2_find_opcode_hash. 2014-11-06 13:12:21 -08:00
ChangeLog-9103
convex.h
cr16.h
cris.h
crx.h
d10v.h
d30v.h
dlx.h
h8300.h
hppa.h
i370.h
i386.h
i860.h
i960.h
ia64.h
m68hc11.h
m68k.h
m88k.h
metag.h
mips.h MIPS: Add Octeon 3 support 2014-10-31 13:50:10 -07:00
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430-decode.h
msp430.h
nds32.h NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt. 2014-09-16 12:28:11 +08:00
nios2.h Add mach parameter to nios2_find_opcode_hash. 2014-11-06 13:12:21 -08:00
nios2r1.h Refactoring/cleanup of nios2 opcodes and assembler code. 2014-10-23 09:54:15 -07:00
np1.h
ns32k.h
pdp11.h
pj.h
pn.h
ppc.h
pyr.h
rl78.h
rx.h
s390.h
score-datadep.h
score-inst.h
sparc.h opcodes, elf: annotate instructions with HWCAP2_VIS3B. 2014-10-17 22:00:02 +02:00
spu-insns.h
spu.h
tahoe.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tic80.h
tilegx.h
tilepro.h
v850.h
vax.h
xgate.h