mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
7c31ae1375
* doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
234 lines
5.1 KiB
Plaintext
234 lines
5.1 KiB
Plaintext
@c Copyright 2008, 2011
|
|
@c Free Software Foundation, Inc.
|
|
@c This is part of the GAS manual.
|
|
@c For copying conditions, see the file as.texinfo.
|
|
|
|
@ifset GENERIC
|
|
@page
|
|
@node LM32-Dependent
|
|
@chapter LM32 Dependent Features
|
|
@end ifset
|
|
|
|
@ifclear GENERIC
|
|
@node Machine Dependencies
|
|
@chapter LM£" Dependent Features
|
|
@end ifclear
|
|
|
|
@cindex LM32 support
|
|
@menu
|
|
* LM32 Options:: Options
|
|
* LM32 Syntax:: Syntax
|
|
* LM32 Opcodes:: Opcodes
|
|
@end menu
|
|
|
|
@node LM32 Options
|
|
@section Options
|
|
@cindex LM32 options (none)
|
|
@cindex options for LM32 (none)
|
|
|
|
@table @code
|
|
|
|
@cindex @code{-mmultiply-enabled} command line option, LM32
|
|
@item -mmultiply-enabled
|
|
Enable multiply instructions.
|
|
|
|
@cindex @code{-mdivide-enabled} command line option, LM32
|
|
@item -mdivide-enabled
|
|
Enable divide instructions.
|
|
|
|
@cindex @code{-mbarrel-shift-enabled} command line option, LM32
|
|
@item -mbarrel-shift-enabled
|
|
Enable barrel-shift instructions.
|
|
|
|
@cindex @code{-msign-extend-enabled} command line option, LM32
|
|
@item -msign-extend-enabled
|
|
Enable sign extend instructions.
|
|
|
|
@cindex @code{-muser-enabled} command line option, LM32
|
|
@item -muser-enabled
|
|
Enable user defined instructions.
|
|
|
|
@cindex @code{-micache-enabled} command line option, LM32
|
|
@item -micache-enabled
|
|
Enable instruction cache related CSRs.
|
|
|
|
@cindex @code{-mdcache-enabled} command line option, LM32
|
|
@item -mdcache-enabled
|
|
Enable data cache related CSRs.
|
|
|
|
@cindex @code{-mbreak-enabled} command line option, LM32
|
|
@item -mbreak-enabled
|
|
Enable break instructions.
|
|
|
|
@cindex @code{-mall-enabled} command line option, LM32
|
|
@item -mall-enabled
|
|
Enable all instructions and CSRs.
|
|
|
|
@end table
|
|
|
|
|
|
@node LM32 Syntax
|
|
@section Syntax
|
|
@menu
|
|
* LM32-Regs:: Register Names
|
|
* LM32-Modifiers:: Relocatable Expression Modifiers
|
|
* LM32-Chars:: Special Characters
|
|
@end menu
|
|
|
|
@node LM32-Regs
|
|
@subsection Register Names
|
|
|
|
@cindex LM32 register names
|
|
@cindex register names, LM32
|
|
|
|
LM32 has 32 x 32-bit general purpose registers @samp{r0},
|
|
@samp{r1}, ... @samp{r31}.
|
|
|
|
The following aliases are defined: @samp{gp} - @samp{r26},
|
|
@samp{fp} - @samp{r27}, @samp{sp} - @samp{r28},
|
|
@samp{ra} - @samp{r29}, @samp{ea} - @samp{r30},
|
|
@samp{ba} - @samp{r31}.
|
|
|
|
LM32 has the following Control and Status Registers (CSRs).
|
|
|
|
@table @code
|
|
@item IE
|
|
Interrupt enable.
|
|
@item IM
|
|
Interrupt mask.
|
|
@item IP
|
|
Interrupt pending.
|
|
@item ICC
|
|
Instruction cache control.
|
|
@item DCC
|
|
Data cache control.
|
|
@item CC
|
|
Cycle counter.
|
|
@item CFG
|
|
Configuration.
|
|
@item EBA
|
|
Exception base address.
|
|
@item DC
|
|
Debug control.
|
|
@item DEBA
|
|
Debug exception base address.
|
|
@item JTX
|
|
JTAG transmit.
|
|
@item JRX
|
|
JTAG receive.
|
|
@item BP0
|
|
Breakpoint 0.
|
|
@item BP1
|
|
Breakpoint 1.
|
|
@item BP2
|
|
Breakpoint 2.
|
|
@item BP3
|
|
Breakpoint 3.
|
|
@item WP0
|
|
Watchpoint 0.
|
|
@item WP1
|
|
Watchpoint 1.
|
|
@item WP2
|
|
Watchpoint 2.
|
|
@item WP3
|
|
Watchpoint 3.
|
|
@end table
|
|
|
|
@node LM32-Modifiers
|
|
@subsection Relocatable Expression Modifiers
|
|
|
|
@cindex LM32 modifiers
|
|
@cindex syntax, LM32
|
|
|
|
The assembler supports several modifiers when using relocatable addresses
|
|
in LM32 instruction operands. The general syntax is the following:
|
|
|
|
@smallexample
|
|
modifier(relocatable-expression)
|
|
@end smallexample
|
|
|
|
@table @code
|
|
@cindex symbol modifiers
|
|
|
|
@item lo
|
|
|
|
This modifier allows you to use bits 0 through 15 of
|
|
an address expression as 16 bit relocatable expression.
|
|
|
|
@item hi
|
|
|
|
This modifier allows you to use bits 16 through 23 of an address expression
|
|
as 16 bit relocatable expression.
|
|
|
|
For example
|
|
|
|
@smallexample
|
|
ori r4, r4, lo(sym+10)
|
|
orhi r4, r4, hi(sym+10)
|
|
@end smallexample
|
|
|
|
@item gp
|
|
|
|
This modified creates a 16-bit relocatable expression that is
|
|
the offset of the symbol from the global pointer.
|
|
|
|
@smallexample
|
|
mva r4, gp(sym)
|
|
@end smallexample
|
|
|
|
@item got
|
|
|
|
This modifier places a symbol in the GOT and creates a 16-bit
|
|
relocatable expression that is the offset into the GOT of this
|
|
symbol.
|
|
|
|
@smallexample
|
|
lw r4, (gp+got(sym))
|
|
@end smallexample
|
|
|
|
@item gotofflo16
|
|
|
|
This modifier allows you to use the bits 0 through 15 of an
|
|
address which is an offset from the GOT.
|
|
|
|
@item gotoffhi16
|
|
|
|
This modifier allows you to use the bits 16 through 31 of an
|
|
address which is an offset from the GOT.
|
|
|
|
@smallexample
|
|
orhi r4, r4, gotoffhi16(lsym)
|
|
addi r4, r4, gotofflo16(lsym)
|
|
@end smallexample
|
|
|
|
@end table
|
|
|
|
@node LM32-Chars
|
|
@subsection Special Characters
|
|
|
|
@cindex line comment character, LM32
|
|
@cindex LM32 line comment character
|
|
The presence of a @samp{#} on a line indicates the start of a comment
|
|
that extends to the end of the current line. Note that if a line
|
|
starts with a @samp{#} character then it can also be a logical line
|
|
number directive (@pxref{Comments}) or a preprocessor
|
|
control command (@pxref{Preprocessing}).
|
|
|
|
@cindex line separator, LM32
|
|
@cindex statement separator, LM32
|
|
@cindex LM32 line separator
|
|
A semicolon (@samp{;}) can be used to separate multiple statements on
|
|
the same line.
|
|
|
|
@node LM32 Opcodes
|
|
@section Opcodes
|
|
|
|
@cindex LM32 opcode summary
|
|
@cindex opcode summary, LM32
|
|
@cindex mnemonics, LM32
|
|
@cindex instruction summary, LM32
|
|
For detailed information on the LM32 machine instruction set, see
|
|
@url{http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/}.
|
|
|
|
@code{@value{AS}} implements all the standard LM32 opcodes.
|