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8a52f0d983
Fix all the cases where endianness needs to be taken into account in the ARM ld dump tests. ld/testsuite/ChangeLog: 2014-04-23 Will Newton <will.newton@linaro.org> * ld-arm/arm-no-rel-plt.ld: Remove OUTPUT_FORMAT and SEARCH_DIR commands. * ld-arm/arm-rel32.d: Update regexps to allow test to pass on armeb-linux-eabi configuration. * ld-arm/data-only-map.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/ifunc-1.gd: Likewise. * ld-arm/ifunc-10.gd: Likewise. * ld-arm/ifunc-11.gd: Likewise. * ld-arm/ifunc-12.gd: Likewise. * ld-arm/ifunc-13.gd: Likewise. * ld-arm/ifunc-14.gd: Likewise. * ld-arm/ifunc-15.gd: Likewise. * ld-arm/ifunc-16.gd: Likewise. * ld-arm/ifunc-17.gd: Likewise. * ld-arm/ifunc-2.gd: Likewise. * ld-arm/ifunc-3.gd: Likewise. * ld-arm/ifunc-4.gd: Likewise. * ld-arm/ifunc-5.gd: Likewise. * ld-arm/ifunc-6.gd: Likewise. * ld-arm/ifunc-7.gd: Likewise. * ld-arm/ifunc-8.gd: Likewise. * ld-arm/ifunc-9.gd: Likewise. * ld-arm/jump-reloc-veneers-long.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise.
21 lines
538 B
Makefile
21 lines
538 B
Makefile
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.+: file format elf32-(big|little)arm.*
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Disassembly of section .foo:
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[0-9a-f]+ <_start>:
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+[0-9a-f]+: f000 f800 bl 2001018 <__func_to_branch_to_veneer>
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[0-9a-f]+ <__func_to_branch_to_veneer>:
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+[0-9a-f]+: 4778 bx pc
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+[0-9a-f]+: 46c0 nop ; \(mov r8, r8\)
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+[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 2001020 <__func_to_branch_to_veneer\+0x8>
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+[0-9a-f]+: ........ .word 0x........
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+[0-9a-f]+: 00000000 .word 0x00000000
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Disassembly of section .text:
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[0-9a-f]+ <func_to_branch_to>:
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+[0-9a-f]+: e12fff1e bx lr
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