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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
54 lines
1.0 KiB
Plaintext
54 lines
1.0 KiB
Plaintext
#mach: crisv32
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#output: Basic clock cycles, total @: 18\n
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#output: Memory source stall cycles: 0\n
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#output: Memory read-after-write stall cycles: 0\n
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#output: Movem source stall cycles: 0\n
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#output: Movem destination stall cycles: 6\n
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#output: Movem address stall cycles: 0\n
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#output: Multiplication source stall cycles: 0\n
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#output: Jump source stall cycles: 0\n
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#output: Branch misprediction stall cycles: 0\n
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#output: Jump target stall cycles: 0\n
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#sim: --cris-cycles=basic
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; Check that movem to register followed by register write dword
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; to one of the registers is logged as needing two stall cycles,
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; regardless of size.
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.include "testutils.inc"
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startnostack
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move.d 0f,r5
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moveq 0,r8
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moveq 0,r9
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movem [r5],r4
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move.d r8,r1
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addq 1,r1 ; 2 cycles.
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movem [r5],r4
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move.w r8,r1
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addq 1,r1 ; 2 cycles.
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movem [r5],r4
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move.b r8,r1
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addq 1,r1 ; 2 cycles.
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movem [r5],r4
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move.b r8,r1
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addq 1,r9
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movem [r5],r4
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move.d r8,r1
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addq 1,r8
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break 15
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.data
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.p2align 5
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0:
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.dword 0b
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.dword 0b
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.dword 0b
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.dword 0b
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.dword 0b
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