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binutils-gdb/sim
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DJ Delorie f9c7014e9c [include/opcode] 
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.

[opcodes]

* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.

[sim/rx]

* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New.  We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache.  Save
decoded opcode information and re-use.  Call DO_RETURN instead of
return throughout.  Remove ediv and edivu.
* mem.c (ptdc): New.  Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here.  Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
..
arm 2010-05-26 Ozkan Sezer <sezeroz@gmail.com> 2010-05-26 22:40:24 +00:00
avr sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
common 2010-05-26 Ozkan Sezer <sezeroz@gmail.com> 2010-05-26 22:40:24 +00:00
cr16 sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
cris 2010-05-26 Ozkan Sezer <sezeroz@gmail.com> 2010-05-26 22:40:24 +00:00
d10v sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
erc32 Fix erc32 sim build failure due to missing stdint.h. 2010-05-20 23:10:24 +00:00
frv sim: profile: implement --profile-file backend 2010-04-22 00:40:44 +00:00
h8300 sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
igen
iq2000
lm32
m32c 2010-05-26 Ozkan Sezer <sezeroz@gmail.com> 2010-05-26 22:40:24 +00:00
m32r
m68hc11
mcore sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
microblaze sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
mips sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
mn10300 sim: mn10300: convert to new sockser status code 2010-04-19 19:03:28 +00:00
moxie sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
ppc sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
rx [include/opcode] 2010-07-29 18:41:28 +00:00
sh sim: constify sim_write source buffer (part 2) 2010-04-14 07:38:06 +00:00
sh64
testsuite sim: unify target->subdir handling for default tests 2010-04-26 16:23:24 +00:00
v850
ChangeLog * MAINTAINERS: Add self as RX maintainer. Sort list. 2010-07-28 21:56:16 +00:00
configure sim: unify target->subdir handling for default tests 2010-04-26 16:23:24 +00:00
configure.ac sim: unify target->subdir handling for default tests 2010-04-26 16:23:24 +00:00
configure.tgt sim: unify target->subdir handling for default tests 2010-04-26 16:23:24 +00:00
MAINTAINERS Sort *alphabetically* this time 2010-07-28 22:31:09 +00:00
Makefile.in
README-HACKING sim: add more hacking notes 2010-04-12 21:44:46 +00:00