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binutils-gdb/ld/testsuite/ld-riscv-elf
History
Jan Beulich 839189bc93 RISC-V: re-arrange opcode table for consistent alias handling 
For disassembly to pick up aliases in favor of underlying insns (helping
readability in the common case), the aliases need to come ahead of the
"base" insns. Slightly more code movement is needed because of insns
with the same name needing to stay next to each other.

Note that the "rorw" alias entry also has the missing INSN_ALIAS added
here.

Clone a few testcases to exercise -Mno-aliases some more, better
covering the differences between the default and that disassembly mode.
2022-09-30 10:19:00 +02:00
..
align-small-region.d RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
align-small-region.ld RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
align-small-region.s RISC-V: Don't separate pcgp relaxation to another relax pass. 2021-10-22 16:44:37 +08:00
attr-merge-arch-01.d RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-01a.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-01b.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-02.d RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-02a.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-02b.s RISC-V: Updated the default ISA spec to 20191213. 2022-01-07 18:48:29 +08:00
attr-merge-arch-03.d RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-03a.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-arch-03b.s RISC-V: Updated the default ISA spec to 20191213. 2022-01-07 18:48:29 +08:00
attr-merge-priv-spec-01.d
attr-merge-priv-spec-02.d
attr-merge-priv-spec-03.d
attr-merge-priv-spec-a.s
attr-merge-priv-spec-b.s
attr-merge-priv-spec-c.s
attr-merge-priv-spec-d.s
attr-merge-priv-spec-failed-01.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-02.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-03.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-04.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-05.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-priv-spec-failed-06.d RISC-V: Error and warning messages tidy. 2021-01-15 17:33:59 +08:00
attr-merge-stack-align-a.s
attr-merge-stack-align-b.s
attr-merge-stack-align-failed-a.s
attr-merge-stack-align-failed-b.s
attr-merge-stack-align-failed.d
attr-merge-stack-align.d
attr-merge-strict-align-01.d
attr-merge-strict-align-01a.s
attr-merge-strict-align-01b.s
attr-merge-strict-align-02.d
attr-merge-strict-align-02a.s
attr-merge-strict-align-02b.s
attr-merge-strict-align-03.d
attr-merge-strict-align-03a.s
attr-merge-strict-align-03b.s
attr-merge-strict-align-04.d
attr-merge-strict-align-04a.s
attr-merge-strict-align-04b.s
attr-merge-strict-align-05.d
attr-merge-strict-align-05a.s
attr-merge-strict-align-05b.s
attr-merge-user-ext-01.d RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-user-ext-rv32i2p1_a2p0.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-merge-user-ext-rv32i2p1_a2p1.s RISC-V: Add 'Zmmul' extension in assembler. 2022-08-30 17:46:11 +08:00
attr-phdr.d RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR. 2021-07-06 11:34:36 +08:00
attr-phdr.s RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR. 2021-07-06 11:34:36 +08:00
c-lui-2.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
c-lui-2.ld
c-lui-2.s
c-lui.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
c-lui.s
call-relax-0.s
call-relax-1.s
call-relax-2.s
call-relax-3.s
call-relax.d RISC-V: Updated the default ISA spec to 20191213. 2022-01-07 18:48:29 +08:00
code-model-01.ld RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-02.ld RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medany-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medany-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medany-weakref-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medany-weakref-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medlow-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medlow-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medlow-weakref-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-medlow-weakref-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medany-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medany-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medany-weakref-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medany-weakref-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medlow-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medlow-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medlow-weakref-01.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model-relax-medlow-weakref-02.d RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
code-model.s RISC-V: Added ld testcases for the medlow and medany code models. 2021-12-14 13:21:20 +08:00
disas-jalr.d
disas-jalr.s
gp-test-lib.sd
gp-test.s
gp-test.sd
ifunc-nonplt-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-nonplt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-01.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
ifunc-plt-01.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-02.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
ifunc-plt-02.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-plt-got-overwrite-exe.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite-pic.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite-pie.rd RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite.d RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-plt-got-overwrite.s RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place. 2020-10-16 10:11:23 +08:00
ifunc-reloc-call-01-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-01.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-call-02.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-data.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-got.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-exe.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-pic.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel-pie.rd RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-reloc-pcrel.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
ifunc-reloc-pcrel.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-nonplt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-pcrel.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-caller-plt.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-exe.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-nonplt-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-pcrel-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-pcrel-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-exe.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-pic.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-plt-pie.d RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ifunc-seperate-resolver.s RISC-V: Support GNU indirect functions. 2020-10-16 10:11:18 +08:00
ld-riscv-elf.exp RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
pcgp-relax-01.d RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcgp-relax-01.s RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcgp-relax-02.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
pcgp-relax-02.s RISC-V: Added ld testcase for pcgp relaxation. 2021-10-22 16:44:43 +08:00
pcrel-lo-addend-2a.d RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2a.s RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2b.d RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-2b.s RISC-V: Check the overflow for %pcrel_lo addend more strictly. 2021-05-14 16:14:00 +08:00
pcrel-lo-addend-3.ld RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3a.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3a.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3b.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3b.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3c.d RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend-3c.s RISC-V: Clarify the addends of pc-relative access. 2021-06-22 17:14:55 +08:00
pcrel-lo-addend.d RISC-V: Fix riscv gas/ld testsuites failures for big endian. 2021-01-06 18:01:41 +08:00
pcrel-lo-addend.s
relax-twice-1.s elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relax-twice-2.s elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relax-twice.ver elf/riscv: Fix relaxation with aliases [PR28021] 2021-07-06 15:49:03 +02:00
relro-relax-lui.d RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-lui.s RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-pcrel.d RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
relro-relax-pcrel.s RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust. 2021-05-31 11:29:26 +08:00
shared-lib-nopic-01.d RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-01.s RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-02.d RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-02.s RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-03.d RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-03.s RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-04.d RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
shared-lib-nopic-04.s RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISCV_JAL. 2022-09-12 11:31:41 +08:00
variant_cc-1.s RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-2.s RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-now.d RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
variant_cc-r.d RISC-V: Always generate R_RISCV_CALL_PLT reloc for call in assembler. 2022-09-21 09:45:58 +08:00
variant_cc-shared.d RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. 2021-11-19 09:32:19 +08:00
weakref32.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
weakref32.s
weakref64.d RISC-V: re-arrange opcode table for consistent alias handling 2022-09-30 10:19:00 +02:00
weakref64.s
weakref.ld