mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-09 04:21:49 +08:00
34a79995c4
There's no real need to emit these always: They're needed only if we indeed want to emit a localized symbol. Hence defer emission until we at least did the basic early checks that would lead to no such symbol getting emitted. This in particular avoids emitting such a symbol in the majority of (if not all) "ld -r" cases. I hope my set of cross build tests caught all the test cases needing adjustment - please forgive if I missed a few. bfd/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * elflink.c (struct elf_outext_info): Add field file_sym_done. (bfd_elf_final_link): Initialize new field. Move fake STT_FILE symbol emission from here ... (elf_link_output_extsym): ... to here. gas/testsuite/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * gas/microblaze/relax_size.elf: Drop expectation of no longer present STT_FILE symbol. * gas/microblaze/relax_size2.elf: Likewise. ld/testsuite/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer present STT_FILE symbol. * ld-mmix/bpo-18.d: Likewise. * ld-mmix/bpo-22.d: Likewise. * ld-mmix/greg-6.d: Likewise. * ld-mmix/greg-7.d: Likewise. * ld-mmix/loc4.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/loct-1.d: Likewise. * ld-sh/sh64/abi32.xd: Likewise. * ld-sh/sh64/abi64.xd: Likewise. * ld-sh/sh64/cmpct1.xd: Likewise. * ld-sh/sh64/crange1.rd: Likewise. * ld-sh/sh64/crange2.rd: Likewise. * ld-sh/sh64/crange3-cmpct.rd: Likewise. * ld-sh/sh64/crange3-media.rd: Likewise. * ld-sh/sh64/crange3.rd: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-sh/sh64/mix1.xd: Likewise. * ld-sh/sh64/mix2.xd: Likewise. * ld-sh/sh64/shdl32.xd: Likewise. * ld-sh/sh64/shdl64.xd: Likewise.
314 lines
7.6 KiB
Makefile
314 lines
7.6 KiB
Makefile
#source: gregget1.s
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#source: greg-1.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-5.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: greg-4.s
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#source: a.s
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#source: start.s
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#as: -x
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#ld: -m elf64mmix
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#objdump: -dt
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# Allocating the maximum number of gregs and referring to one at the
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# *other* end still works.
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.*: file format elf64-mmix
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SYMBOL TABLE:
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0+ l d \.text 0+ (|\.text)
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0+100 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
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0+ l df \*ABS\* 0+ .*
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0+21 l \*REG\* 0+ P
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0+22 l \*REG\* 0+ O
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0+23 l \*REG\* 0+ N
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0+24 l \*REG\* 0+ M
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0+25 l \*REG\* 0+ L
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0+26 l \*REG\* 0+ K
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0+27 l \*REG\* 0+ J
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0+28 l \*REG\* 0+ I
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0+29 l \*REG\* 0+ H
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0+2a l \*REG\* 0+ G
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0+2b l \*REG\* 0+ F
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0+2c l \*REG\* 0+ E
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0+2d l \*REG\* 0+ D
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0+2e l \*REG\* 0+ C
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0+2f l \*REG\* 0+ B
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0+30 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+31 l \*REG\* 0+ P
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0+32 l \*REG\* 0+ O
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0+33 l \*REG\* 0+ N
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0+34 l \*REG\* 0+ M
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0+35 l \*REG\* 0+ L
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0+36 l \*REG\* 0+ K
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0+37 l \*REG\* 0+ J
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0+38 l \*REG\* 0+ I
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0+39 l \*REG\* 0+ H
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0+3a l \*REG\* 0+ G
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0+3b l \*REG\* 0+ F
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0+3c l \*REG\* 0+ E
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0+3d l \*REG\* 0+ D
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0+3e l \*REG\* 0+ C
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0+3f l \*REG\* 0+ B
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0+40 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+41 l \*REG\* 0+ P
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0+42 l \*REG\* 0+ O
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0+43 l \*REG\* 0+ N
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0+44 l \*REG\* 0+ M
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0+45 l \*REG\* 0+ L
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0+46 l \*REG\* 0+ K
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0+47 l \*REG\* 0+ J
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0+48 l \*REG\* 0+ I
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0+49 l \*REG\* 0+ H
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0+4a l \*REG\* 0+ G
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0+4b l \*REG\* 0+ F
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0+4c l \*REG\* 0+ E
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0+4d l \*REG\* 0+ D
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0+4e l \*REG\* 0+ C
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0+4f l \*REG\* 0+ B
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0+50 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+51 l \*REG\* 0+ P
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0+52 l \*REG\* 0+ O
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0+53 l \*REG\* 0+ N
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0+54 l \*REG\* 0+ M
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0+55 l \*REG\* 0+ L
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0+56 l \*REG\* 0+ K
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0+57 l \*REG\* 0+ J
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0+58 l \*REG\* 0+ I
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0+59 l \*REG\* 0+ H
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0+5a l \*REG\* 0+ G
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0+5b l \*REG\* 0+ F
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0+5c l \*REG\* 0+ E
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0+5d l \*REG\* 0+ D
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0+5e l \*REG\* 0+ C
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0+5f l \*REG\* 0+ B
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0+60 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+61 l \*REG\* 0+ P
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0+62 l \*REG\* 0+ O
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0+63 l \*REG\* 0+ N
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0+64 l \*REG\* 0+ M
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0+65 l \*REG\* 0+ L
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0+66 l \*REG\* 0+ K
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0+67 l \*REG\* 0+ J
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0+68 l \*REG\* 0+ I
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0+69 l \*REG\* 0+ H
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0+6a l \*REG\* 0+ G
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0+6b l \*REG\* 0+ F
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0+6c l \*REG\* 0+ E
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0+6d l \*REG\* 0+ D
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0+6e l \*REG\* 0+ C
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0+6f l \*REG\* 0+ B
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0+70 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+71 l \*REG\* 0+ P
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0+72 l \*REG\* 0+ O
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0+73 l \*REG\* 0+ N
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0+74 l \*REG\* 0+ M
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0+75 l \*REG\* 0+ L
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0+76 l \*REG\* 0+ K
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0+77 l \*REG\* 0+ J
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0+78 l \*REG\* 0+ I
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0+79 l \*REG\* 0+ H
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0+7a l \*REG\* 0+ G
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0+7b l \*REG\* 0+ F
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0+7c l \*REG\* 0+ E
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0+7d l \*REG\* 0+ D
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0+7e l \*REG\* 0+ C
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0+7f l \*REG\* 0+ B
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0+80 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+81 l \*REG\* 0+ P
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0+82 l \*REG\* 0+ O
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0+83 l \*REG\* 0+ N
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0+84 l \*REG\* 0+ M
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0+85 l \*REG\* 0+ L
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0+86 l \*REG\* 0+ K
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0+87 l \*REG\* 0+ J
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0+88 l \*REG\* 0+ I
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0+89 l \*REG\* 0+ H
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0+8a l \*REG\* 0+ G
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0+8b l \*REG\* 0+ F
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0+8c l \*REG\* 0+ E
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0+8d l \*REG\* 0+ D
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0+8e l \*REG\* 0+ C
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0+8f l \*REG\* 0+ B
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0+90 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+91 l \*REG\* 0+ P
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0+92 l \*REG\* 0+ O
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0+93 l \*REG\* 0+ N
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0+94 l \*REG\* 0+ M
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0+95 l \*REG\* 0+ L
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0+96 l \*REG\* 0+ K
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0+97 l \*REG\* 0+ J
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0+98 l \*REG\* 0+ I
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0+99 l \*REG\* 0+ H
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0+9a l \*REG\* 0+ G
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0+9b l \*REG\* 0+ F
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0+9c l \*REG\* 0+ E
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0+9d l \*REG\* 0+ D
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0+9e l \*REG\* 0+ C
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0+9f l \*REG\* 0+ B
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0+a0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+a1 l \*REG\* 0+ P
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0+a2 l \*REG\* 0+ O
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0+a3 l \*REG\* 0+ N
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0+a4 l \*REG\* 0+ M
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0+a5 l \*REG\* 0+ L
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0+a6 l \*REG\* 0+ K
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0+a7 l \*REG\* 0+ J
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0+a8 l \*REG\* 0+ I
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0+a9 l \*REG\* 0+ H
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0+aa l \*REG\* 0+ G
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0+ab l \*REG\* 0+ F
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0+ac l \*REG\* 0+ E
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0+ad l \*REG\* 0+ D
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0+ae l \*REG\* 0+ C
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0+af l \*REG\* 0+ B
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0+b0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+b1 l \*REG\* 0+ P
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0+b2 l \*REG\* 0+ O
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0+b3 l \*REG\* 0+ N
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0+b4 l \*REG\* 0+ M
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0+b5 l \*REG\* 0+ L
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0+b6 l \*REG\* 0+ K
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0+b7 l \*REG\* 0+ J
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0+b8 l \*REG\* 0+ I
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0+b9 l \*REG\* 0+ H
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0+ba l \*REG\* 0+ G
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0+bb l \*REG\* 0+ F
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0+bc l \*REG\* 0+ E
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0+bd l \*REG\* 0+ D
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0+be l \*REG\* 0+ C
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0+bf l \*REG\* 0+ B
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0+c0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+c1 l \*REG\* 0+ P
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0+c2 l \*REG\* 0+ O
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0+c3 l \*REG\* 0+ N
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0+c4 l \*REG\* 0+ M
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0+c5 l \*REG\* 0+ L
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0+c6 l \*REG\* 0+ K
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0+c7 l \*REG\* 0+ J
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0+c8 l \*REG\* 0+ I
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0+c9 l \*REG\* 0+ H
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0+ca l \*REG\* 0+ G
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0+cb l \*REG\* 0+ F
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0+cc l \*REG\* 0+ E
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0+cd l \*REG\* 0+ D
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0+ce l \*REG\* 0+ C
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0+cf l \*REG\* 0+ B
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0+d0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+d1 l \*REG\* 0+ P
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0+d2 l \*REG\* 0+ O
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0+d3 l \*REG\* 0+ N
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0+d4 l \*REG\* 0+ M
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0+d5 l \*REG\* 0+ L
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0+d6 l \*REG\* 0+ K
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0+d7 l \*REG\* 0+ J
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0+d8 l \*REG\* 0+ I
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0+d9 l \*REG\* 0+ H
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0+da l \*REG\* 0+ G
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0+db l \*REG\* 0+ F
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0+dc l \*REG\* 0+ E
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0+dd l \*REG\* 0+ D
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0+de l \*REG\* 0+ C
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0+df l \*REG\* 0+ B
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0+e0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+e1 l \*REG\* 0+ P
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0+e2 l \*REG\* 0+ O
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0+e3 l \*REG\* 0+ N
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0+e4 l \*REG\* 0+ M
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0+e5 l \*REG\* 0+ L
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0+e6 l \*REG\* 0+ K
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0+e7 l \*REG\* 0+ J
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0+e8 l \*REG\* 0+ I
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0+e9 l \*REG\* 0+ H
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0+ea l \*REG\* 0+ G
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0+eb l \*REG\* 0+ F
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0+ec l \*REG\* 0+ E
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0+ed l \*REG\* 0+ D
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0+ee l \*REG\* 0+ C
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0+ef l \*REG\* 0+ B
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0+f0 l \*REG\* 0+ A
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0+ l df \*ABS\* 0+ .*
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0+f1 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f2 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f3 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f4 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f5 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f6 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f7 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f8 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+f9 l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+fa l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+fb l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+fc l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+fd l \*REG\* 0+ lsym
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0+ l df \*ABS\* 0+ .*
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0+fe l \*REG\* 0+ lsym
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0+14 g \.text 0+ _start
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0+20 g \*REG\* 0+ areg
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2000000000000000 g \.text 0+ __bss_start
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2000000000000000 g \.text 0+ _edata
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2000000000000000 g \.text 0+ _end
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0+14 g \.text 0+ _start\.
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0+10 g \.text 0+ a
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Disassembly of section \.text:
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0+ <a-0x10>:
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0: e3200010 setl \$32,0x10
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4: e6200000 incml \$32,0x0
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8: e5200000 incmh \$32,0x0
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c: e4200000 inch \$32,0x0
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0+10 <a>:
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10: e3fd0004 setl \$253,0x4
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0+14 <_start>:
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14: e3fd0001 setl \$253,0x1
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