binutils-gdb/ld/testsuite/ld-arm/mixed-app-v5.d
Andrew Burgess 8cb6e17571 opcodes/arm: use '@' consistently for the comment character
Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.

I then spotted a couple of places where there was no ';', but instead,
just a '@' character.  I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.

Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator.  Thus this:

    nop    ;@ comment

is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.

This:

    nop    @ comment

is a single 'nop' instruction followed by a comment.  And finally,
this:

    nop    ; comment

is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.

Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.

The question then is how should the disassembler style the three cases
above?

As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment.  But what about ';' in
the second example?  Style as text?  Style as a comment?

And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic?  Style as text?  Style as a comment?

I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.

Then, in the next commit, it's obvious what to do.

There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.
2022-11-01 09:32:13 +00:00

57 lines
1.4 KiB
Makefile

tmpdir/mixed-app-v5: file format elf32-(little|big)arm
architecture: arm.*, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x.*
Disassembly of section .plt:
.* <.plt>:
.*: e52de004 push {lr} @ \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] @ .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*
.* <lib_func2@plt>:
.*: e28fc6.* add ip, pc, #.*
.*: e28cca.* add ip, ip, #.* @ 0x.*
.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
.* <lib_func1@plt>:
.*: e28fc6.* add ip, pc, #.*
.*: e28cca.* add ip, ip, #.* @ 0x.*
.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
Disassembly of section .text:
.* <_start>:
.*: e1a0c00d mov ip, sp
.*: e92dd800 push {fp, ip, lr, pc}
.*: eb000004 bl .* <app_func>
.*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.* <app_func>:
.*: e1a0c00d mov ip, sp
.*: e92dd800 push {fp, ip, lr, pc}
.*: ebffffee bl .*
.*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.* <app_func2>:
.*: e12fff1e bx lr
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.*: e1a00000 nop @ \(mov r0, r0\)
.* <app_tfunc>:
.*: b500 push {lr}
.*: f7ff efc. blx .* <lib_func2@plt>
.*: bd00 pop {pc}
.*: 4770 bx lr
#...