mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-09 04:21:49 +08:00
36e6c1400b
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest one-instruction addressing for TLS LE model when tls size is smaller 4K. Linker need to make sure there is no TLS offset overflow. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all potential high overflowed bits. ld/testsuite/ * ld-aarch64/tprel_add_lo12_overflow.s: New testcase. * ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
24 lines
390 B
ArmAsm
24 lines
390 B
ArmAsm
.cpu generic
|
|
.global ff
|
|
.section .tdata,"awT",%progbits
|
|
.align 2
|
|
.type ff, %object
|
|
# Maximum 12bit - 16byte TCB header is the upper limit
|
|
# for tprel_add_lo12
|
|
.size ff, 4096 - 16
|
|
ff:
|
|
.zero 4096 - 16
|
|
.global i
|
|
.type i, %object
|
|
.size i, 4
|
|
i:
|
|
.zero 4
|
|
.text
|
|
.align 2
|
|
.global main
|
|
.type main, %function
|
|
main:
|
|
add x0, x0, #:tprel_lo12:i
|
|
ret
|
|
.size main, .-main
|