binutils-gdb/sim/testsuite/pru
Dimitar Dimitrov 7bee555bb7 sim: pru: Fix behaviour when loop count is zero
If the counter for LOOP instruction is provided by a register with
value zero, then the instruction must cause a PC jump directly to the
loop end.  But in that particular case simulator must not initialize
its internal loop variables, because loop body will not be executed.
Instead, simulator must obtain the loop's end address directly from
the LOOP instruction.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2022-11-12 15:10:07 +02:00
..
add.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
allinsn.exp sim: testsuite: cleanup the istarget * logic 2022-02-16 00:36:47 -05:00
ChangeLog-2021 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
dmem-zero-pass.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
dmem-zero-trap.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
dram.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
jmp.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
lmbd.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
loop-imm.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
loop-reg.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
loop-zero.s sim: pru: Fix behaviour when loop count is zero 2022-11-12 15:10:07 +02:00
mul.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
subreg.s Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
testutils.inc Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00