mirror of
https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
264 lines
4.6 KiB
ArmAsm
264 lines
4.6 KiB
ArmAsm
# Hitachi H8 testcase 'mac'
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# mach(): h8300s h8sx
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# as(h8300): --defsym sim_cpu=0
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# as(h8300h): --defsym sim_cpu=1
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# as(h8300s): --defsym sim_cpu=2
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# as(h8sx): --defsym sim_cpu=3
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# ld(h8300h): -m h8300helf
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# ld(h8300s): -m h8300self
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# ld(h8sx): -m h8300sxelf
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.include "testutils.inc"
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.data
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src1: .word 0
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src2: .word 0
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array: .word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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.word 0x7fff
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start
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.if (sim_cpu)
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_clrmac:
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set_grs_a5a5
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set_ccr_zero
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clrmac
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test_cc_clear
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test_grs_a5a5
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;; Now see if the mac is actually clear...
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stmac mach, er0
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test_zero_set
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er0
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stmac macl, er1
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test_zero_set
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er1
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ld_stmac:
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set_grs_a5a5
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sub.l er2, er2
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set_ccr_zero
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ldmac er1, macl
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stmac macl, er2
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test_ovf_clear
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test_carry_clear
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;; neg and zero are undefined
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test_h_gr32 0xa5a5a5a5 er2
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sub.l er2, er2
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set_ccr_zero
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ldmac er1, mach
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stmac mach, er2
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test_ovf_clear
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test_carry_clear
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;; neg and zero are undefined
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test_h_gr32 0x0001a5 er2
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test_gr_a5a5 0 ; Make sure other general regs not disturbed
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test_gr_a5a5 1
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test_gr_a5a5 3
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test_gr_a5a5 4
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test_gr_a5a5 5
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test_gr_a5a5 6
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test_gr_a5a5 7
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mac_2x2:
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set_grs_a5a5
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mov.w #2, r1
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mov.w r1, @src1
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mov.w #2, r2
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mov.w r2, @src2
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mov #src1, er1
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mov #src2, er2
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set_ccr_zero
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clrmac
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mac @er1+, @er2+
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test_cc_clear
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 src1+2 er1
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test_h_gr32 src2+2 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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stmac macl, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 4 er0
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stmac mach, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er0
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mac_same_reg_2x4:
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;; Use same reg for src and dst. Should be incremented twice,
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;; and fetch values from consecutive locations.
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set_grs_a5a5
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mov.w #2, r1
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mov.w r1, @src1
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mov.w #4, r2
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mov.w r2, @src2
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mov #src1, er1
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set_ccr_zero
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clrmac
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mac @er1+, @er1+ ; same register for src and dst
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test_cc_clear
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 src1+4 er1
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test_h_gr32 0xa5a50004 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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stmac macl, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 8 er0
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stmac mach, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er0
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mac_0x0:
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set_grs_a5a5
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mov.w #0, r1
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mov.w r1, @src1
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mov.w #0, r2
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mov.w r2, @src2
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mov #src1, er1
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mov #src2, er2
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set_ccr_zero
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clrmac
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mac @er1+, @er2+
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test_cc_clear
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 src1+2 er1
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test_h_gr32 src2+2 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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stmac macl, er0
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test_zero_set ; zero flag is set
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er0 ; result is zero
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stmac mach, er0
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test_zero_set
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0 er0
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mac_neg2x2:
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set_grs_a5a5
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mov.w #-2, r1
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mov.w r1, @src1
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mov.w #2, r2
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mov.w r2, @src2
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mov #src1, er1
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mov #src2, er2
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set_ccr_zero
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clrmac
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mac @er1+, @er2+
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test_cc_clear
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 src1+2 er1
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test_h_gr32 src2+2 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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stmac macl, er0
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test_zero_clear
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test_neg_set ; neg flag is set
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test_ovf_clear
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test_h_gr32 -4 er0 ; result is negative
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stmac mach, er0
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test_zero_clear
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test_neg_set
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test_ovf_clear
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test_h_gr32 -1 er0 ; negative sign extend
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mac_array:
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;; Use same reg for src and dst, pointing to an array of shorts
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set_grs_a5a5
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mov #array, er1
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set_ccr_zero
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clrmac
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mac @er1+, @er1+ ; same register for src and dst
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mac @er1+, @er1+ ; repeat 8 times
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mac @er1+, @er1+
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mac @er1+, @er1+
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mac @er1+, @er1+
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mac @er1+, @er1+
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mac @er1+, @er1+
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mac @er1+, @er1+
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test_cc_clear
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 array+32 er1
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test_h_gr32 0xa5a5a5a5 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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stmac macl, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 0xfff80008 er0
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stmac mach, er0
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test_zero_clear
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test_neg_clear
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test_ovf_clear
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test_h_gr32 1 er0 ; result is greater than 32 bits
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.endif
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pass
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exit 0
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