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46f238477f
For reasons that remain largely to be investigated (besides the apparent lack of synchronization between two processes), this test fails randomly, with two different sets of common outputs. Curiously, that doesn't happen for the other similar tests. There's a comment that mentions this, though that doesn't make it a sustainable part of a test-suite. (Known-blinking tests should be disabled until fixed.) sim/testsuite/cris: * hw/rv-n-cris/irq1.ms: Disable by use of a never-matched "progos" value.
71 lines
1.3 KiB
Plaintext
71 lines
1.3 KiB
Plaintext
#progos: nowhere:disabled-due-to-randomness
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#mach: crisv10 crisv32
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#sim(crisv10): --hw-device "/rv/trace? true"
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#sim(crisv32): --hw-device "/rv/trace? true"
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#output: /rv: WD\n
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#output: /rv: REG R 0xd0000032\n
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#output: /rv: := 0xabcdef01\n
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#output: /rv: IRQ 0x4\n
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#output: /rv: REG R 0xd0000036\n
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#output: /rv: := 0x76543210\n
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#output: /rv: REG R 0xd0000036\n
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#output: /rv: := 0x76543211\n
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#output: /rv: REG R 0xd0000030\n
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#output: /rv: IRQ 0x0\n
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#output: /rv: := 0xeeff4455\n
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#output: pass\n
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# Trivial test of interrupts.
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# Locations of IRQ notifiers above depend on when the simulator is
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# polled; adjustments may be needed (after checking that no poll is
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# gone due to a bug!)
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#r W,
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#r r,a8832,abcdef01
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#r I,4
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#r r,a8836,76543210
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#r r,a8836,76543211
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#r I,0
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#r r,a8830,eeff4455
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.lcomm dummy,4
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.include "testutils.inc"
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start
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.if ..asm.arch.cris.v32
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move irqvec1,$ebp
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.else
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move irqvec1,$ibr
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.endif
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test_h_mem 0xabcdef01 0xd0000032
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nop
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nop
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test_h_mem 0x76543210 0xd0000036
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ei
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test_h_mem 0,dummy
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wouldreturnhere:
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nop
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killme:
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fail
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returnhere:
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test_h_mem 0x76543211 0xd0000036
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test_h_mem 0xeeff4455 0xd0000030
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pass
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irq0x33:
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.if ..asm.arch.cris.v32
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test_h_dr wouldreturnhere,$erp
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move returnhere,$erp
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rete
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rfe
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.else
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move $dccr,$r0
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test_h_dr wouldreturnhere,$irp
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move returnhere,$irp
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reti
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move $r0,$dccr
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.endif
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singlevec irqvec1,0x33,irq0x33
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