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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
253 lines
4.6 KiB
ArmAsm
253 lines
4.6 KiB
ArmAsm
//Original:/proj/frio/dv/testcases/core/c_except_sys_sstep/c_except_sys_sstep.dsp
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// Spec Reference: Single Step Supervisor Exception Test (NO REGTRACE!)
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# mach: bfin
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# sim: --environment operating
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#include "test.h"
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.include "testutils.inc"
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start
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include(gen_int.inc)
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include(selfcheck.inc)
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include(std.inc)
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#ifndef STACKSIZE
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#define STACKSIZE 0x10
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#endif
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#ifndef EVT
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#define EVT 0xFFE02000
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#endif
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#ifndef EVT15
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#define EVT15 0xFFE0203C
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#endif
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#ifndef EVT_OVERRIDE
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#define EVT_OVERRIDE 0xFFE02100
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#endif
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//
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////MY_GEN_INT_INIT(0xF0000000) // set location for interrupt table
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//
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// Reset/Bootstrap Code
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// (Here we should set the processor operating modes, initialize registers,
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// etc.)
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//
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BOOT:
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INIT_R_REGS(0); // initialize general purpose regs
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INIT_P_REGS(0); // initialize the pointers
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INIT_I_REGS(0); // initialize the dsp address regs
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INIT_M_REGS(0);
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INIT_L_REGS(0);
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INIT_B_REGS(0);
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// CHECK_INIT(p2, 0x2000);
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include(symtable.inc)
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CHECK_INIT_DEF(p2);
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LD32_LABEL(sp, KSTACK); // setup the stack pointer
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FP = SP; // and frame pointer
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LD32(p0, EVT); // Setup Event Vectors and Handlers
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LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0)
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1)
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2)
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3)
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[ P0 ++ ] = R0;
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[ P0 ++ ] = R0; // IVT4 not used
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LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, THANDLE); // Timer Handler (Int6)
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
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[ P0 ++ ] = R0;
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LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
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[ P0 ++ ] = R0;
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LD32(p0, EVT_OVERRIDE);
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R0 = 0;
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[ P0 ++ ] = R0;
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R0 = -1; // Change this to mask interrupts (*)
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[ P0 ] = R0; // IMASK
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DUMMY:
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R0 = 0 (Z);
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LT0 = r0; // set loop counters to something deterministic
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LB0 = r0;
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LC0 = r0;
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LT1 = r0;
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LB1 = r0;
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LC1 = r0;
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ASTAT = r0; // reset other internal regs
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R0 = 1;
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SYSCFG = r0; // Enable Supervisor Single Step
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R4 = 0;
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LD32_LABEL(r0, START);
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RETI = r0; // We need to load the return address
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RTI;
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START:
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LD32_LABEL(sp, USTACK); // setup the stack pointer
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FP = SP; // set frame pointer
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JUMP BEGIN;
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//*********************************************************************
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BEGIN:
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R0 = 0;
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R1 = 1;
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R2 = 2;
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R3 = 3;
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R5 = 5;
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R6 = 6;
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R7 = 7;
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EXCPT 3; // turn off single step via handler
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CHECKREG(r4, 0x0b); // 11 instrs are executed before single step = disabled
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CHECKREG(r0, 0x00);
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CHECKREG(r1, 0x03);
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CHECKREG(r2, 0x10);
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CHECKREG(r3, 0x04);
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CHECKREG(r5, 0x09);
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CHECKREG(r6, 0x06);
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CHECKREG(r7, 0x07);
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// PUT YOUR TEST HERE!
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END:
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dbg_pass; // End the test
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//*********************************************************************
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//
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// Handlers for Events
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//
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EHANDLE: // Emulation Handler 0
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RTE;
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RHANDLE: // Reset Handler 1
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RTI;
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NHANDLE: // NMI Handler 2
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RTN;
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XHANDLE: // Exception Handler 3
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[ -- SP ] = ASTAT; // save ASTAT
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R1 = SEQSTAT;
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R1 <<= 26;
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R1 >>= 26; // only want EXCAUSE
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R2 = 0x10; // EXCAUSE 0x10 means Single Step (exception)
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CC = r1 == r2;
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IF CC JUMP SSCOUNT; // Go to Single Step Handler
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SYSCFG = r0; // otherwise must be an EXCPT, so turn off singlestep
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R3 += 1;
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JUMP.S EXIT;
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SSCOUNT:
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R4 += 1; // R4 counts single step events
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EXIT:
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ASTAT = [sp++];
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R5 += 1;
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RTX;
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HWHANDLE: // HW Error Handler 5
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RTI;
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THANDLE: // Timer Handler 6
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RTI;
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I7HANDLE: // IVG 7 Handler
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RTI;
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I8HANDLE: // IVG 8 Handler
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RTI;
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I9HANDLE: // IVG 9 Handler
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RTI;
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I10HANDLE: // IVG 10 Handler
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RTI;
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I11HANDLE: // IVG 11 Handler
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RTI;
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I12HANDLE: // IVG 12 Handler
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RTI;
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I13HANDLE: // IVG 13 Handler
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RTI;
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I14HANDLE: // IVG 14 Handler
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RTI;
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I15HANDLE: // IVG 15 Handler
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RTI;
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NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
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//
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// Data Segment
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//
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.data
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DATA:
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.space (0x10);
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// Stack Segments (Both Kernel and User)
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.space (STACKSIZE);
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KSTACK:
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.space (STACKSIZE);
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USTACK:
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